Convert arm_setup_page_tables into a generic helper

This function is not related to Arm platforms and can be reused by other
platforms if needed.

Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e8
Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

diff --git a/include/common/bl_common.h b/include/common/bl_common.h
index af598d0da9217471c2eede232b451de5c28e0142..2ecf281c00da15f43404afab85cb49039f3a6084 100644 (file)
--- a/include/common/bl_common.h
+++ b/include/common/bl_common.h
@@ -193,6 +193,11 @@ extern const char version_string[];
 void print_entry_point_info(const entry_point_info_t *ep_info);
 uintptr_t page_align(uintptr_t value, unsigned dir);
 
+struct mmap_region;
+
+void setup_page_tables(const struct mmap_region *bl_regions,
+                          const struct mmap_region *plat_regions);
+
 #endif /*__ASSEMBLY__*/
 
 #endif /* __BL_COMMON_H__ */

diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h
index b93381ddb2dda7b5940813c0cfea02ac22c70587..bdcb1441540e6ed138fb904f092a14ae14a069cd 100644 (file)
--- a/include/plat/arm/common/plat_arm.h
+++ b/include/plat/arm/common/plat_arm.h
@@ -66,12 +66,6 @@ typedef struct arm_tzc_regions_info {
                <= MAX_MMAP_REGIONS,                                      \
                assert_max_mmap_regions);
 
-/*
- * Utility functions common to ARM standard platforms
- */
-void arm_setup_page_tables(const mmap_region_t bl_regions[],
-                          const mmap_region_t plat_regions[]);
-
 void arm_setup_romlib(void);
 
 #if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32))

diff --git a/plat/arm/board/fvp/fvp_common.c b/plat/arm/board/fvp/fvp_common.c
index 836fd93f3d0fd7a97d9d7ba5d10b786ff255841d..f5198f68678824c1ea19d6a99ea7f49f159dfd4a 100644 (file)
--- a/plat/arm/board/fvp/fvp_common.c
+++ b/plat/arm/board/fvp/fvp_common.c
@@ -53,8 +53,8 @@ arm_config_t arm_config;
 
 /*
  * Table of memory regions for various BL stages to map using the MMU.
- * This doesn't include Trusted SRAM as arm_setup_page_tables() already
- * takes care of mapping it.
+ * This doesn't include Trusted SRAM as setup_page_tables() already takes care
+ * of mapping it.
  *
  * The flash needs to be mapped as writable in order to erase the FIP's Table of
  * Contents in case of unrecoverable error (see plat_error_handler()).

diff --git a/plat/arm/board/juno/juno_common.c b/plat/arm/board/juno/juno_common.c
index 40b1a275af6e08a29047dbcc3523eced777df5bc..2e6b01134f7dc6e55bbe4bcde0397e55d895243e 100644 (file)
--- a/plat/arm/board/juno/juno_common.c
+++ b/plat/arm/board/juno/juno_common.c
@@ -8,8 +8,8 @@
 
 /*
  * Table of memory regions for different BL stages to map using the MMU.
- * This doesn't include Trusted SRAM as arm_setup_page_tables() already
- * takes care of mapping it.
+ * This doesn't include Trusted SRAM as setup_page_tables() already takes care
+ * of mapping it.
  */
 #ifdef IMAGE_BL1
 const mmap_region_t plat_arm_mmap[] = {

diff --git a/plat/arm/common/arm_bl1_setup.c b/plat/arm/common/arm_bl1_setup.c
index d67c0c275a9319558b22eab9765b981115b690ff..f760e18dceb8ae86266b7bbbad8324e828556ef9 100644 (file)
--- a/plat/arm/common/arm_bl1_setup.c
+++ b/plat/arm/common/arm_bl1_setup.c
@@ -123,7 +123,7 @@ void arm_bl1_plat_arch_setup(void)
                {0}
        };
 
-       arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
+       setup_page_tables(bl_regions, plat_arm_get_mmap());
 #ifdef AARCH32
        enable_mmu_svc_mon(0);
 #else

diff --git a/plat/arm/common/arm_bl2_el3_setup.c b/plat/arm/common/arm_bl2_el3_setup.c
index c67ab4914271ce60d67300041001cf9eb0ee6c4e..4f5e6a9e6e2794add41ef0cbd934c2db5dfc5c11 100644 (file)
--- a/plat/arm/common/arm_bl2_el3_setup.c
+++ b/plat/arm/common/arm_bl2_el3_setup.c
@@ -79,7 +79,7 @@ void arm_bl2_el3_plat_arch_setup(void)
                {0}
        };
 
-       arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
+       setup_page_tables(bl_regions, plat_arm_get_mmap());
 
 #ifdef AARCH32
        enable_mmu_svc_mon(0);

diff --git a/plat/arm/common/arm_bl2_setup.c b/plat/arm/common/arm_bl2_setup.c
index d31f6dc3c75f332a5e0ea06b7d7a4598e4ea8538..628a50def42c136b85816d06c5700e03eb8ba1fb 100644 (file)
--- a/plat/arm/common/arm_bl2_setup.c
+++ b/plat/arm/common/arm_bl2_setup.c
@@ -125,7 +125,7 @@ void arm_bl2_plat_arch_setup(void)
                {0}
        };
 
-       arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
+       setup_page_tables(bl_regions, plat_arm_get_mmap());
 
 #ifdef AARCH32
        enable_mmu_svc_mon(0);

diff --git a/plat/arm/common/arm_bl2u_setup.c b/plat/arm/common/arm_bl2u_setup.c
index b518f0f62fec0a10472cdc4d8f19aacf7711cd38..3848aa065d8b80a671562f8ecf4efe7efbd3d181 100644 (file)
--- a/plat/arm/common/arm_bl2u_setup.c
+++ b/plat/arm/common/arm_bl2u_setup.c
@@ -80,7 +80,7 @@ void arm_bl2u_plat_arch_setup(void)
                {0}
        };
 
-       arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
+       setup_page_tables(bl_regions, plat_arm_get_mmap());
 
 #ifdef AARCH32
        enable_mmu_svc_mon(0);

diff --git a/plat/arm/common/arm_bl31_setup.c b/plat/arm/common/arm_bl31_setup.c
index 059c9d50d9e09fe036cf7812c9ad508388d1b746..24d55709545fd43dc2f1a6d8602e2ca83efea3b7 100644 (file)
--- a/plat/arm/common/arm_bl31_setup.c
+++ b/plat/arm/common/arm_bl31_setup.c
@@ -302,7 +302,7 @@ void __init arm_bl31_plat_arch_setup(void)
                {0}
        };
 
-       arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
+       setup_page_tables(bl_regions, plat_arm_get_mmap());
 
        enable_mmu_el3(0);
 

diff --git a/plat/arm/common/arm_common.c b/plat/arm/common/arm_common.c
index 243159c776bbd67d7a3c0d25b0c077efcc9eedf4..6b1478545371765e4097e526f2ecec1d1ac41f7f 100644 (file)
--- a/plat/arm/common/arm_common.c
+++ b/plat/arm/common/arm_common.c
@@ -32,42 +32,6 @@ void arm_setup_romlib(void)
 #endif
 }
 
-/*
- * Set up the page tables for the generic and platform-specific memory regions.
- * The size of the Trusted SRAM seen by the BL image must be specified as well
- * as an array specifying the generic memory regions which can be;
- * - Code section;
- * - Read-only data section;
- * - Init code section, if applicable
- * - Coherent memory region, if applicable.
- */
-
-void __init arm_setup_page_tables(const mmap_region_t bl_regions[],
-                          const mmap_region_t plat_regions[])
-{
-#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
-       const mmap_region_t *regions = bl_regions;
-
-       while (regions->size != 0U) {
-               VERBOSE("Region: 0x%lx - 0x%lx has attributes 0x%x\n",
-                               regions->base_va,
-                               (regions->base_va + regions->size),
-                               regions->attr);
-               regions++;
-       }
-#endif
-       /*
-        * Map the Trusted SRAM with appropriate memory attributes.
-        * Subsequent mappings will adjust the attributes for specific regions.
-        */
-       mmap_add(bl_regions);
-       /* Now (re-)map the platform-specific memory regions */
-       mmap_add(plat_regions);
-
-       /* Create the page tables to reflect the above mappings */
-       init_xlat_tables();
-}
-
 uintptr_t plat_get_ns_image_entrypoint(void)
 {
 #ifdef PRELOADED_BL33_BASE

diff --git a/plat/arm/common/sp_min/arm_sp_min_setup.c b/plat/arm/common/sp_min/arm_sp_min_setup.c
index b8234c186190a99cfe3b55532b7e38abdc57ca11..e151073f7c6aa6223792877827d4202a261e109c 100644 (file)
--- a/plat/arm/common/sp_min/arm_sp_min_setup.c
+++ b/plat/arm/common/sp_min/arm_sp_min_setup.c
@@ -208,7 +208,7 @@ void sp_min_plat_arch_setup(void)
                {0}
        };
 
-       arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
+       setup_page_tables(bl_regions, plat_arm_get_mmap());
 
        enable_mmu_svc_mon(0);
 }

diff --git a/plat/arm/common/tsp/arm_tsp_setup.c b/plat/arm/common/tsp/arm_tsp_setup.c
index 2d42d8e00be77b57c6492798e8a93a08f4e1469b..3cf88251f1fb2e4292fcb343de4e6437b6ac84a2 100644 (file)
--- a/plat/arm/common/tsp/arm_tsp_setup.c
+++ b/plat/arm/common/tsp/arm_tsp_setup.c
@@ -85,6 +85,6 @@ void tsp_plat_arch_setup(void)
                {0}
        };
 
-       arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
+       setup_page_tables(bl_regions, plat_arm_get_mmap());
        enable_mmu_el1(0);
 }

diff --git a/plat/common/plat_bl_common.c b/plat/common/plat_bl_common.c
index 50d79d422039e2f4ba30357420a9d7411cb9d878..4cf1cc57355d83fc1f95d80f2ad1077da3346e08 100644 (file)
--- a/plat/common/plat_bl_common.c
+++ b/plat/common/plat_bl_common.c
@@ -73,3 +73,40 @@ int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
        return 0;
 }
 #endif /* TRUSTED_BOARD_BOOT */
+
+/*
+ * Set up the page tables for the generic and platform-specific memory regions.
+ * The size of the Trusted SRAM seen by the BL image must be specified as well
+ * as an array specifying the generic memory regions which can be;
+ * - Code section;
+ * - Read-only data section;
+ * - Init code section, if applicable
+ * - Coherent memory region, if applicable.
+ */
+
+void __init setup_page_tables(const mmap_region_t *bl_regions,
+                             const mmap_region_t *plat_regions)
+{
+#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
+       const mmap_region_t *regions = bl_regions;
+
+       while (regions->size != 0U) {
+               VERBOSE("Region: 0x%lx - 0x%lx has attributes 0x%x\n",
+                               regions->base_va,
+                               regions->base_va + regions->size,
+                               regions->attr);
+               regions++;
+       }
+#endif
+       /*
+        * Map the Trusted SRAM with appropriate memory attributes.
+        * Subsequent mappings will adjust the attributes for specific regions.
+        */
+       mmap_add(bl_regions);
+
+       /* Now (re-)map the platform-specific memory regions */
+       mmap_add(plat_regions);
+
+       /* Create the page tables to reflect the above mappings */
+       init_xlat_tables();
+}

diff --git a/plat/ti/k3/common/k3_bl31_setup.c b/plat/ti/k3/common/k3_bl31_setup.c
index f84b9d4490d187383a065ad908533d4929cb18f6..e438dc36c69d2957770cb502c7e90cba6e4a05df 100644 (file)
--- a/plat/ti/k3/common/k3_bl31_setup.c
+++ b/plat/ti/k3/common/k3_bl31_setup.c
@@ -108,7 +108,7 @@ void bl31_plat_arch_setup(void)
                {0}
        };
 
-       arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
+       setup_page_tables(bl_regions, plat_arm_get_mmap());
        enable_mmu_el3(0);
 }
 

diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
index a14388f56a147f10652d7a782ae5d2bf8e862be9..01634500aff0d06c974da8447c97d368b7c6cabe 100644 (file)
--- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
+++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -193,6 +193,6 @@ void bl31_plat_arch_setup(void)
                {0}
        };
 
-       arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
+       setup_page_tables(bl_regions, plat_arm_get_mmap());
        enable_mmu_el3(0);
 }

diff --git a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
index 52d4bf8cc335fd625b7f333fc6559d45c1e18011..a27f34b45b8af924b8130a449e89646ac0ba6bea 100644 (file)
--- a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
+++ b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -57,6 +57,6 @@ void tsp_plat_arch_setup(void)
                {0}
        };
 
-       arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
+       setup_page_tables(bl_regions, plat_arm_get_mmap());
        enable_mmu_el1(0);
 }