rockchip: sdram: Use the rk_clr/setreg() interface

Use this function in preference to the macro.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
index 09017ccf5e634142e0e77a3b2b7b3d9f8bf0e7d8..5da04b9b05d976d68d6108420e256971d9bfce18 100644 (file)
--- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
@@ -400,7 +400,7 @@ static void set_bandwidth_ratio(const struct chan_info *chan, u32 channel,
 
        if (n == 1) {
                setbits_le32(&pctl->ppcfg, 1);
-               writel(RK_SETBITS(1 << (8 + channel)), &grf->soc_con0);
+               rk_setreg(&grf->soc_con0, 1 << (8 + channel));
                setbits_le32(&msch->ddrtiming, 1 << 31);
                /* Data Byte disable*/
                clrbits_le32(&publ->datx8[2].dxgcr, 1);
@@ -410,7 +410,7 @@ static void set_bandwidth_ratio(const struct chan_info *chan, u32 channel,
                setbits_le32(&publ->datx8[3].dxdllcr, DXDLLCR_DLLDIS);
        } else {
                clrbits_le32(&pctl->ppcfg, 1);
-               writel(RK_CLRBITS(1 << (8 + channel)), &grf->soc_con0);
+               rk_clrreg(&grf->soc_con0, 1 << (8 + channel));
                clrbits_le32(&msch->ddrtiming, 1 << 31);
                /* Data Byte enable*/
                setbits_le32(&publ->datx8[2].dxgcr, 1);
@@ -571,8 +571,7 @@ static void dram_all_config(const struct dram_info *dram,
                dram_cfg_rbc(&dram->chan[chan], chan, sdram_params);
        }
        writel(sys_reg, &dram->pmu->sys_reg[2]);
-       writel(RK_CLRSETBITS(0x1F, sdram_params->base.stride),
-              &dram->sgrf->soc_con2);
+       rk_clrsetreg(&dram->sgrf->soc_con2, 0x1f, sdram_params->base.stride);
 }
 
 static int sdram_init(const struct dram_info *dram,