drm/nouveau/nvif: move internal class identifiers to class.h
authorBen Skeggs <bskeggs@redhat.com>
Sun, 8 Nov 2015 00:18:19 +0000 (10:18 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Mon, 11 Jan 2016 01:17:40 +0000 (11:17 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/include/nvif/class.h
drivers/gpu/drm/nouveau/include/nvif/ioctl.h
drivers/gpu/drm/nouveau/nouveau_abi16.c
drivers/gpu/drm/nouveau/nouveau_chan.c
drivers/gpu/drm/nouveau/nouveau_sysfs.c
drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c
drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c
drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c

index 95a64d89547cde1a2aec3bf8e363f93d5644a0d0..8bf8161f973063afd0075f694dd1a0e2b97d51e2 100644 (file)
@@ -1,9 +1,14 @@
 #ifndef __NVIF_CLASS_H__
 #define __NVIF_CLASS_H__
 
-/*******************************************************************************
- * class identifiers
- ******************************************************************************/
+/* these class numbers are made up by us, and not nvidia-assigned */
+#define NVIF_CLASS_CONTROL                                                   -1
+#define NVIF_CLASS_PERFMON                                                   -2
+#define NVIF_CLASS_PERFDOM                                                   -3
+#define NVIF_CLASS_SW_NV04                                                   -4
+#define NVIF_CLASS_SW_NV10                                                   -5
+#define NVIF_CLASS_SW_NV50                                                   -6
+#define NVIF_CLASS_SW_GF100                                                  -7
 
 /* the below match nvidia-assigned (either in hw, or sw) class numbers */
 #define NV_DEVICE                                                    0x00000080
index b0ac0215ebf981b7a440c3ac43c5e2f80f2c2fd4..c5f5eb83a59449c1a55918588dcd4d0edc83546f 100644 (file)
@@ -55,14 +55,6 @@ struct nvif_ioctl_new_v0 {
        __u64 token;
        __u64 object;
        __u32 handle;
-/* these class numbers are made up by us, and not nvidia-assigned */
-#define NVIF_IOCTL_NEW_V0_CONTROL                                            -1
-#define NVIF_IOCTL_NEW_V0_PERFMON                                            -2
-#define NVIF_IOCTL_NEW_V0_PERFDOM                                            -3
-#define NVIF_IOCTL_NEW_V0_SW_NV04                                            -4
-#define NVIF_IOCTL_NEW_V0_SW_NV10                                            -5
-#define NVIF_IOCTL_NEW_V0_SW_NV50                                            -6
-#define NVIF_IOCTL_NEW_V0_SW_GF100                                           -7
        __s32 oclass;
        __u8  data[];           /* class data (class.h) */
 };
index 7f50cf5f929e9f025e77f74b1fc2ce638de98bd1..a6afeaf17f15d2e364f4dffa57ac462bb21aeda9 100644 (file)
@@ -87,18 +87,18 @@ nouveau_abi16_swclass(struct nouveau_drm *drm)
 {
        switch (drm->device.info.family) {
        case NV_DEVICE_INFO_V0_TNT:
-               return NVIF_IOCTL_NEW_V0_SW_NV04;
+               return NVIF_CLASS_SW_NV04;
        case NV_DEVICE_INFO_V0_CELSIUS:
        case NV_DEVICE_INFO_V0_KELVIN:
        case NV_DEVICE_INFO_V0_RANKINE:
        case NV_DEVICE_INFO_V0_CURIE:
-               return NVIF_IOCTL_NEW_V0_SW_NV10;
+               return NVIF_CLASS_SW_NV10;
        case NV_DEVICE_INFO_V0_TESLA:
-               return NVIF_IOCTL_NEW_V0_SW_NV50;
+               return NVIF_CLASS_SW_NV50;
        case NV_DEVICE_INFO_V0_FERMI:
        case NV_DEVICE_INFO_V0_KEPLER:
        case NV_DEVICE_INFO_V0_MAXWELL:
-               return NVIF_IOCTL_NEW_V0_SW_GF100;
+               return NVIF_CLASS_SW_GF100;
        }
 
        return 0x0000;
@@ -433,10 +433,10 @@ nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS)
                /* nvsw: compatibility with older 0x*6e class identifier */
                for (i = 0; !oclass && i < ret; i++) {
                        switch (sclass[i].oclass) {
-                       case NVIF_IOCTL_NEW_V0_SW_NV04:
-                       case NVIF_IOCTL_NEW_V0_SW_NV10:
-                       case NVIF_IOCTL_NEW_V0_SW_NV50:
-                       case NVIF_IOCTL_NEW_V0_SW_GF100:
+                       case NVIF_CLASS_SW_NV04:
+                       case NVIF_CLASS_SW_NV10:
+                       case NVIF_CLASS_SW_NV50:
+                       case NVIF_CLASS_SW_GF100:
                                oclass = sclass[i].oclass;
                                break;
                        default:
index 1860f389f21f157fa7b1795e1a5b7a5ccab64098..0a853ad5a21fddfaaf917ed9897197bd3715c292 100644 (file)
@@ -378,7 +378,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
        /* allocate software object class (used for fences on <= nv05) */
        if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) {
                ret = nvif_object_init(&chan->user, 0x006e,
-                                      NVIF_IOCTL_NEW_V0_SW_NV04,
+                                      NVIF_CLASS_SW_NV04,
                                       NULL, 0, &chan->nvsw);
                if (ret)
                        return ret;
index 5dac3546c1b89679842300fd1b2aff9f5c5e3da6..87f6416a8c82ecf8bc357c5c34eed585d8052d5f 100644 (file)
@@ -188,7 +188,7 @@ nouveau_sysfs_init(struct drm_device *dev)
        if (!sysfs)
                return -ENOMEM;
 
-       ret = nvif_object_init(&device->object, 0, NVIF_IOCTL_NEW_V0_CONTROL,
+       ret = nvif_object_init(&device->object, 0, NVIF_CLASS_CONTROL,
                               NULL, 0, &sysfs->ctrl);
        if (ret == 0)
                device_create_file(nvxx_device(device)->dev, &dev_attr_pstate);
index cf8bc068e9b70db105fa360cf07b2c2484cd7ee6..93b29caed07e679418ac8d57776d0f0e9935fe6c 100644 (file)
@@ -204,7 +204,7 @@ nvkm_control_new(struct nvkm_device *device, const struct nvkm_oclass *oclass,
 
 const struct nvkm_device_oclass
 nvkm_control_oclass = {
-       .base.oclass = NVIF_IOCTL_NEW_V0_CONTROL,
+       .base.oclass = NVIF_CLASS_CONTROL,
        .base.minver = -1,
        .base.maxver = -1,
        .ctor = nvkm_control_new,
index 2721592d3031c3da9c4fdc49c2b902a57f542017..808a23914c4df57d4606a9f2105111e8d2747925 100644 (file)
@@ -612,7 +612,7 @@ nvkm_perfmon_child_get(struct nvkm_object *object, int index,
                       struct nvkm_oclass *oclass)
 {
        if (index == 0) {
-               oclass->base.oclass = NVIF_IOCTL_NEW_V0_PERFDOM;
+               oclass->base.oclass = NVIF_CLASS_PERFDOM;
                oclass->base.minver = 0;
                oclass->base.maxver = 0;
                oclass->ctor = nvkm_perfmon_child_new;
@@ -679,7 +679,7 @@ nvkm_pm_oclass_new(struct nvkm_device *device, const struct nvkm_oclass *oclass,
 
 static const struct nvkm_device_oclass
 nvkm_pm_oclass = {
-       .base.oclass = NVIF_IOCTL_NEW_V0_PERFMON,
+       .base.oclass = NVIF_CLASS_PERFMON,
        .base.minver = -1,
        .base.maxver = -1,
        .ctor = nvkm_pm_oclass_new,
index b01ef7eca906599f2fce24a8de0e81dde7804b03..ea8f4247b628d4acfe97c5b7494a51822f970c27 100644 (file)
@@ -28,8 +28,8 @@
 #include <engine/disp.h>
 #include <engine/fifo.h>
 
+#include <nvif/class.h>
 #include <nvif/event.h>
-#include <nvif/ioctl.h>
 
 /*******************************************************************************
  * software context
@@ -143,7 +143,7 @@ static const struct nvkm_sw_func
 gf100_sw = {
        .chan_new = gf100_sw_chan_new,
        .sclass = {
-               { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_GF100 } },
+               { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_GF100 } },
                {}
        }
 };
index 445217ffa7911c73ea0ab6a12eb3a11ebe58d190..2405116bffc7fcc4d9febb2f331db89f87bd9d4e 100644 (file)
@@ -126,7 +126,7 @@ static const struct nvkm_sw_func
 nv04_sw = {
        .chan_new = nv04_sw_chan_new,
        .sclass = {
-               { nv04_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV04 } },
+               { nv04_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV04 } },
                {}
        }
 };
index adf70d92b244347813eb7aa3979c83af92a3c100..09d22fcd194c0cf3b036e0da0524206e1264a693 100644 (file)
@@ -25,7 +25,7 @@
 #include "chan.h"
 #include "nvsw.h"
 
-#include <nvif/ioctl.h>
+#include <nvif/class.h>
 
 /*******************************************************************************
  * software context
@@ -56,7 +56,7 @@ static const struct nvkm_sw_func
 nv10_sw = {
        .chan_new = nv10_sw_chan_new,
        .sclass = {
-               { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV10 } },
+               { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV10 } },
                {}
        }
 };
index a381196af69de6c679fe58785b998c8271113915..01573d187f2c66aac93139d6ecd7c06b5decc800 100644 (file)
@@ -28,8 +28,8 @@
 #include <engine/fifo/chan.h>
 #include <subdev/bar.h>
 
+#include <nvif/class.h>
 #include <nvif/event.h>
-#include <nvif/ioctl.h>
 
 /*******************************************************************************
  * software context
@@ -136,7 +136,7 @@ static const struct nvkm_sw_func
 nv50_sw = {
        .chan_new = nv50_sw_chan_new,
        .sclass = {
-               { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV50 } },
+               { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV50 } },
                {}
        }
 };