#ifndef __NVIF_CLASS_H__
#define __NVIF_CLASS_H__
-/*******************************************************************************
- * class identifiers
- ******************************************************************************/
+/* these class numbers are made up by us, and not nvidia-assigned */
+#define NVIF_CLASS_CONTROL -1
+#define NVIF_CLASS_PERFMON -2
+#define NVIF_CLASS_PERFDOM -3
+#define NVIF_CLASS_SW_NV04 -4
+#define NVIF_CLASS_SW_NV10 -5
+#define NVIF_CLASS_SW_NV50 -6
+#define NVIF_CLASS_SW_GF100 -7
/* the below match nvidia-assigned (either in hw, or sw) class numbers */
#define NV_DEVICE 0x00000080
__u64 token;
__u64 object;
__u32 handle;
-/* these class numbers are made up by us, and not nvidia-assigned */
-#define NVIF_IOCTL_NEW_V0_CONTROL -1
-#define NVIF_IOCTL_NEW_V0_PERFMON -2
-#define NVIF_IOCTL_NEW_V0_PERFDOM -3
-#define NVIF_IOCTL_NEW_V0_SW_NV04 -4
-#define NVIF_IOCTL_NEW_V0_SW_NV10 -5
-#define NVIF_IOCTL_NEW_V0_SW_NV50 -6
-#define NVIF_IOCTL_NEW_V0_SW_GF100 -7
__s32 oclass;
__u8 data[]; /* class data (class.h) */
};
{
switch (drm->device.info.family) {
case NV_DEVICE_INFO_V0_TNT:
- return NVIF_IOCTL_NEW_V0_SW_NV04;
+ return NVIF_CLASS_SW_NV04;
case NV_DEVICE_INFO_V0_CELSIUS:
case NV_DEVICE_INFO_V0_KELVIN:
case NV_DEVICE_INFO_V0_RANKINE:
case NV_DEVICE_INFO_V0_CURIE:
- return NVIF_IOCTL_NEW_V0_SW_NV10;
+ return NVIF_CLASS_SW_NV10;
case NV_DEVICE_INFO_V0_TESLA:
- return NVIF_IOCTL_NEW_V0_SW_NV50;
+ return NVIF_CLASS_SW_NV50;
case NV_DEVICE_INFO_V0_FERMI:
case NV_DEVICE_INFO_V0_KEPLER:
case NV_DEVICE_INFO_V0_MAXWELL:
- return NVIF_IOCTL_NEW_V0_SW_GF100;
+ return NVIF_CLASS_SW_GF100;
}
return 0x0000;
/* nvsw: compatibility with older 0x*6e class identifier */
for (i = 0; !oclass && i < ret; i++) {
switch (sclass[i].oclass) {
- case NVIF_IOCTL_NEW_V0_SW_NV04:
- case NVIF_IOCTL_NEW_V0_SW_NV10:
- case NVIF_IOCTL_NEW_V0_SW_NV50:
- case NVIF_IOCTL_NEW_V0_SW_GF100:
+ case NVIF_CLASS_SW_NV04:
+ case NVIF_CLASS_SW_NV10:
+ case NVIF_CLASS_SW_NV50:
+ case NVIF_CLASS_SW_GF100:
oclass = sclass[i].oclass;
break;
default:
/* allocate software object class (used for fences on <= nv05) */
if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) {
ret = nvif_object_init(&chan->user, 0x006e,
- NVIF_IOCTL_NEW_V0_SW_NV04,
+ NVIF_CLASS_SW_NV04,
NULL, 0, &chan->nvsw);
if (ret)
return ret;
if (!sysfs)
return -ENOMEM;
- ret = nvif_object_init(&device->object, 0, NVIF_IOCTL_NEW_V0_CONTROL,
+ ret = nvif_object_init(&device->object, 0, NVIF_CLASS_CONTROL,
NULL, 0, &sysfs->ctrl);
if (ret == 0)
device_create_file(nvxx_device(device)->dev, &dev_attr_pstate);
const struct nvkm_device_oclass
nvkm_control_oclass = {
- .base.oclass = NVIF_IOCTL_NEW_V0_CONTROL,
+ .base.oclass = NVIF_CLASS_CONTROL,
.base.minver = -1,
.base.maxver = -1,
.ctor = nvkm_control_new,
struct nvkm_oclass *oclass)
{
if (index == 0) {
- oclass->base.oclass = NVIF_IOCTL_NEW_V0_PERFDOM;
+ oclass->base.oclass = NVIF_CLASS_PERFDOM;
oclass->base.minver = 0;
oclass->base.maxver = 0;
oclass->ctor = nvkm_perfmon_child_new;
static const struct nvkm_device_oclass
nvkm_pm_oclass = {
- .base.oclass = NVIF_IOCTL_NEW_V0_PERFMON,
+ .base.oclass = NVIF_CLASS_PERFMON,
.base.minver = -1,
.base.maxver = -1,
.ctor = nvkm_pm_oclass_new,
#include <engine/disp.h>
#include <engine/fifo.h>
+#include <nvif/class.h>
#include <nvif/event.h>
-#include <nvif/ioctl.h>
/*******************************************************************************
* software context
gf100_sw = {
.chan_new = gf100_sw_chan_new,
.sclass = {
- { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_GF100 } },
+ { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_GF100 } },
{}
}
};
nv04_sw = {
.chan_new = nv04_sw_chan_new,
.sclass = {
- { nv04_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV04 } },
+ { nv04_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV04 } },
{}
}
};
#include "chan.h"
#include "nvsw.h"
-#include <nvif/ioctl.h>
+#include <nvif/class.h>
/*******************************************************************************
* software context
nv10_sw = {
.chan_new = nv10_sw_chan_new,
.sclass = {
- { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV10 } },
+ { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV10 } },
{}
}
};
#include <engine/fifo/chan.h>
#include <subdev/bar.h>
+#include <nvif/class.h>
#include <nvif/event.h>
-#include <nvif/ioctl.h>
/*******************************************************************************
* software context
nv50_sw = {
.chan_new = nv50_sw_chan_new,
.sclass = {
- { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV50 } },
+ { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV50 } },
{}
}
};