ARMV7: OMAP3: Add support for Beagle xM

This patch adds support for the Beagle xM.  It uses the board ID
GPIO bits to recognize this revision and perform appropriate setup.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index ec95ad09b850b14f0ea1446ae463bf1b714d9cb9..4647908052c10afbbe0e1b726f33f3c129bb96d5 100644 (file)
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -58,12 +58,13 @@ int board_init(void)
 /*
  * Routine: get_board_revision
  * Description: Detect if we are running on a Beagle revision Ax/Bx,
- *             C1/2/3, or C4. This can be done by reading
+ *             C1/2/3, C4 or xM. This can be done by reading
  *             the level of GPIO173, GPIO172 and GPIO171. This should
  *             result in
  *             GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
  *             GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
  *             GPIO173, GPIO172, GPIO171: 1 0 1 => C4
+ *             GPIO173, GPIO172, GPIO171: 0 0 0 => xM
  */
 int get_board_revision(void)
 {
@@ -115,7 +116,7 @@ int misc_init_r(void)
                break;
        case REVISION_C4:
                printf("Beagle Rev C4\n");
-               setenv("beaglerev", "Cx");
+               setenv("beaglerev", "C4");
                setenv("mpurate", "720");
                MUX_BEAGLE_C();
                /* Set VAUX2 to 1.8V for EHCI PHY */
@@ -124,6 +125,17 @@ int misc_init_r(void)
                                        TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
                                        TWL4030_PM_RECEIVER_DEV_GRP_P1);
                break;
+       case REVISION_XM:
+               printf("Beagle xM Rev A\n");
+               setenv("beaglerev", "xMA");
+               setenv("mpurate", "1000");
+               MUX_BEAGLE_XM();
+               /* Set VAUX2 to 1.8V for EHCI PHY */
+               twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
+                                       TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
+                                       TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
+                                       TWL4030_PM_RECEIVER_DEV_GRP_P1);
+               break;
        default:
                printf("Beagle unknown 0x%02x\n", get_board_revision());
        }

diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
index e5f380c84b7774b740504787b67acb14fb8b2b9e..d86033772b86c70c781e07f5c64fa536902c28de 100644 (file)
--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
@@ -37,6 +37,7 @@ const omap3_sysinfo sysinfo = {
 #define REVISION_AXBX  0x7
 #define REVISION_CX    0x6
 #define REVISION_C4    0x5
+#define REVISION_XM    0x0
 
 /*
  * IEN  - Input Enable
@@ -377,11 +378,37 @@ const omap3_sysinfo sysinfo = {
        MUX_VAL(CP(SDRC_CKE1),          (IDIS | PTU | EN  | M0)) /*sdrc_cke1*/
 
 #define MUX_BEAGLE_C() \
-       MUX_VAL(CP(MCBSP3_DX),          (IEN | PTD | DIS | M4)) /*GPIO_140*/\
-       MUX_VAL(CP(MCBSP3_DR),          (IEN | PTD | DIS | M4)) /*GPIO_142*/\
-       MUX_VAL(CP(MCBSP3_CLKX),        (IEN | PTD | DIS | M4)) /*GPIO_141*/\
+       MUX_VAL(CP(MCBSP3_DX),          (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
+       MUX_VAL(CP(MCBSP3_DR),          (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+       MUX_VAL(CP(MCBSP3_CLKX),        (IEN  | PTD | DIS | M4)) /*GPIO_141*/\
        MUX_VAL(CP(UART2_CTS),          (IEN  | PTU | EN  | M0)) /*UART2_CTS*/\
        MUX_VAL(CP(UART2_RTS),          (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
        MUX_VAL(CP(UART2_TX),           (IDIS | PTD | DIS | M0)) /*UART2_TX*/
 
+#define MUX_BEAGLE_XM() \
+       MUX_VAL(CP(MCBSP3_DX),          (IEN  | PTD | DIS | M4)) /*GPIO_140*/\
+       MUX_VAL(CP(MCBSP3_DR),          (IEN  | PTD | DIS | M4)) /*GPIO_142*/\
+       MUX_VAL(CP(MCBSP3_CLKX),        (IEN  | PTD | DIS | M4)) /*GPIO_141*/\
+       MUX_VAL(CP(UART2_CTS),          (IEN  | PTU | EN  | M0)) /*UART2_CTS*/\
+       MUX_VAL(CP(UART2_RTS),          (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
+       MUX_VAL(CP(UART2_TX),           (IDIS | PTD | DIS | M0)) /*UART2_TX*/\
+       MUX_VAL(CP(DSS_DATA0),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA1),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA2),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA3),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA4),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA5),          (IDIS | PTD | DIS | M7)) /*safe_mode*/\
+       MUX_VAL(CP(DSS_DATA18),         (IDIS | PTD | DIS | M3)) /*DSS_DATA0*/\
+       MUX_VAL(CP(DSS_DATA19),         (IDIS | PTD | DIS | M3)) /*DSS_DATA1*/\
+       MUX_VAL(CP(DSS_DATA20),         (IDIS | PTD | DIS | M3)) /*DSS_DATA2*/\
+       MUX_VAL(CP(DSS_DATA21),         (IDIS | PTD | DIS | M3)) /*DSS_DATA3*/\
+       MUX_VAL(CP(DSS_DATA22),         (IDIS | PTD | DIS | M3)) /*DSS_DATA4*/\
+       MUX_VAL(CP(DSS_DATA23),         (IDIS | PTD | DIS | M3)) /*DSS_DATA5*/\
+       MUX_VAL(CP(SYS_BOOT0),          (IDIS | PTD | DIS | M3)) /*DSS_DATA18*/\
+       MUX_VAL(CP(SYS_BOOT1),          (IDIS | PTD | DIS | M3)) /*DSS_DATA19*/\
+       MUX_VAL(CP(SYS_BOOT3),          (IDIS | PTD | DIS | M3)) /*DSS_DATA20*/\
+       MUX_VAL(CP(SYS_BOOT4),          (IDIS | PTD | DIS | M3)) /*DSS_DATA21*/\
+       MUX_VAL(CP(SYS_BOOT5),          (IDIS | PTD | DIS | M3)) /*DSS_DATA22*/\
+       MUX_VAL(CP(SYS_BOOT6),          (IDIS | PTD | DIS | M3)) /*DSS_DATA23*/
+
 #endif