obj-y := prom.o irq.o setup.o devices.o gpio.o ar71xx.o
+obj-$(CONFIG_PCI) += pci.o
+
obj-$(CONFIG_AR71XX_MACH_AP81) += mach-ap81.o
obj-$(CONFIG_AR71XX_MACH_AP83) += mach-ap83.o
obj-$(CONFIG_AR71XX_MACH_AW_NR580) += mach-aw-nr580.o
--- /dev/null
+/*
+ * Atheros AR71xx PCI setup code
+ *
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <asm/mach-ar71xx/ar71xx.h>
+#include <asm/mach-ar71xx/pci.h>
+
+unsigned ar71xx_pci_nr_irqs __initdata;
+struct ar71xx_pci_irq *ar71xx_pci_irq_map __initdata;
+
+int (*ar71xx_pci_plat_dev_init)(struct pci_dev *dev);
+
+static int ar71xx_be_handler(struct pt_regs *regs, int is_fixup)
+{
+ int err = 0;
+
+ err = ar71xx_pci_be_handler(is_fixup);
+
+ return (is_fixup && !err) ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
+}
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ if (ar71xx_pci_plat_dev_init)
+ return ar71xx_pci_plat_dev_init(dev);
+
+ return 0;
+}
+
+int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
+{
+ return ar71xx_pcibios_map_irq(dev, slot, pin);
+}
+
+int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map)
+{
+ ar71xx_pci_nr_irqs = nr_irqs;
+ ar71xx_pci_irq_map = map;
+
+ board_be_handler = ar71xx_be_handler;
+
+ return ar71xx_pci_bios_init();
+}
*/
#include <linux/kernel.h>
-#include <linux/module.h>
#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/pci.h>
#include <linux/serial_8250.h>
#include <linux/bootmem.h>
#include <asm/bootinfo.h>
-#include <asm/traps.h>
#include <asm/time.h> /* for mips_hpt_frequency */
#include <asm/reboot.h> /* for _machine_{restart,halt} */
#include <asm/mips_machine.h>
enum ar71xx_soc_type ar71xx_soc;
EXPORT_SYMBOL_GPL(ar71xx_soc);
-int (*ar71xx_pci_bios_init)(unsigned nr_irqs,
- struct ar71xx_pci_irq *map) __initdata;
-
-int (*ar71xx_pci_be_handler)(int is_fixup);
-
static char ar71xx_sys_type[AR71XX_SYS_TYPE_LEN];
static void ar71xx_restart(char *command)
cpu_wait();
}
-static int ar71xx_be_handler(struct pt_regs *regs, int is_fixup)
-{
- int err = 0;
-
- if (ar71xx_pci_be_handler)
- err = ar71xx_pci_be_handler(is_fixup);
-
- return (is_fixup && !err) ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
-}
-
-int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map)
-{
- if (!ar71xx_pci_bios_init)
- return 0;
-
- return ar71xx_pci_bios_init(nr_irqs, map);
-}
-
static void __init ar71xx_detect_mem_size(void)
{
unsigned long size;
_machine_halt = ar71xx_halt;
pm_power_off = ar71xx_halt;
- board_be_handler = ar71xx_be_handler;
-
ar71xx_early_serial_setup();
}
/*
* Atheros AR71xx SoC specific PCI definitions
*
- * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
#ifndef __ASM_MACH_AR71XX_PCI_H
#define __ASM_MACH_AR71XX_PCI_H
+struct pci_dev;
+
struct ar71xx_pci_irq {
int irq;
u8 slot;
u8 pin;
};
-extern int (*ar71xx_pci_be_handler)(int is_fixup);
-extern int (*ar71xx_pci_bios_init)(unsigned nr_irqs,
- struct ar71xx_pci_irq *map) __initdata;
+extern int (*ar71xx_pci_plat_dev_init)(struct pci_dev *dev);
+extern unsigned ar71xx_pci_nr_irqs __initdata;
+extern struct ar71xx_pci_irq *ar71xx_pci_irq_map __initdata;
+
+int ar71xx_pcibios_map_irq(const struct pci_dev *dev,
+ uint8_t slot, uint8_t pin) __init;
+int ar71xx_pcibios_init(void) __init;
+
+int ar71xx_pci_be_handler(int is_fixup);
-extern int ar71xx_pci_init(unsigned nr_irqs,
- struct ar71xx_pci_irq *map) __init;
+int ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map) __init;
#endif /* __ASM_MACH_AR71XX_PCI_H */
/*
* Atheros AR71xx PCI host controller driver
*
- * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros' 2.6.15 BSP
#define PCI_IDSEL_BASE 0
#endif
-static unsigned ar71xx_pci_nr_irqs;
-static struct ar71xx_pci_irq *ar71xx_pci_irq_map __initdata;
static void __iomem *ar71xx_pcicfg_base;
-
static DEFINE_SPINLOCK(ar71xx_pci_lock);
static inline void ar71xx_pci_delay(void)
return ret;
}
-static int __ar71xx_pci_be_handler(int is_fixup)
+int ar71xx_pci_be_handler(int is_fixup)
{
u32 pci_err;
u32 ahb_err;
ar71xx_pcicfg_wr(PCI_REG_CFG_CBE,
cmd | ar71xx_pci_get_ble(where, size, 0));
- return __ar71xx_pci_be_handler(1);
+ return ar71xx_pci_be_handler(1);
}
static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
pci_write_config_word(dev, PCI_COMMAND, t);
}
-
DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ar71xx_pci_fixup);
-int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
+int __init ar71xx_pcibios_map_irq(const struct pci_dev *dev, uint8_t slot,
+ uint8_t pin)
{
int irq = -1;
int i;
return irq;
}
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
-
static struct pci_ops ar71xx_pci_ops = {
.read = ar71xx_pci_read_config,
.write = ar71xx_pci_write_config,
.io_resource = &ar71xx_pci_io_resource,
};
-static int __init __ar71xx_pci_bios_init(unsigned nr_irqs,
- struct ar71xx_pci_irq *map)
+int __init ar71xx_pcibios_init(void)
{
ar71xx_device_stop(RESET_MODULE_PCI_BUS | RESET_MODULE_PCI_CORE);
ar71xx_pci_delay();
ar71xx_pci_delay();
/* clear bus errors */
- (void)__ar71xx_pci_be_handler(1);
-
- ar71xx_pci_nr_irqs = nr_irqs;
- ar71xx_pci_irq_map = map;
- ar71xx_pci_be_handler = __ar71xx_pci_be_handler;
+ (void)ar71xx_pci_be_handler(1);
register_pci_controller(&ar71xx_pci_controller);
return 0;
}
-
-static int __init __ar71xx_pci_init(void)
-{
- ar71xx_pci_bios_init = __ar71xx_pci_bios_init;
- return 0;
-}
-pure_initcall(__ar71xx_pci_init);