powerpc: Remove oprofile RS64 support

We no longer support these cpus, so we don't need oprofile support for
them either.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

diff --git a/arch/powerpc/include/asm/oprofile_impl.h b/arch/powerpc/include/asm/oprofile_impl.h
index d697b08994c916dd40e6eabb593fb28e67cd6135..61fe5d6f18e1ad68f1d5c697c8b17d6f14d32a75 100644 (file)
--- a/arch/powerpc/include/asm/oprofile_impl.h
+++ b/arch/powerpc/include/asm/oprofile_impl.h
@@ -61,7 +61,6 @@ struct op_powerpc_model {
 };
 
 extern struct op_powerpc_model op_model_fsl_emb;
-extern struct op_powerpc_model op_model_rs64;
 extern struct op_powerpc_model op_model_power4;
 extern struct op_powerpc_model op_model_7450;
 extern struct op_powerpc_model op_model_cell;

diff --git a/arch/powerpc/oprofile/Makefile b/arch/powerpc/oprofile/Makefile
index 751ec7bd50187e8d62e18d6768c441235a33ff13..cedbbeced632be4a98d8a8e3cc3f8b1437fa4f13 100644 (file)
--- a/arch/powerpc/oprofile/Makefile
+++ b/arch/powerpc/oprofile/Makefile
@@ -14,6 +14,6 @@ oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
 oprofile-$(CONFIG_OPROFILE_CELL) += op_model_cell.o \
                cell/spu_profiler.o cell/vma_map.o \
                cell/spu_task_sync.o
-oprofile-$(CONFIG_PPC_BOOK3S_64) += op_model_rs64.o op_model_power4.o op_model_pa6t.o
+oprofile-$(CONFIG_PPC_BOOK3S_64) += op_model_power4.o op_model_pa6t.o
 oprofile-$(CONFIG_FSL_EMB_PERFMON) += op_model_fsl_emb.o
 oprofile-$(CONFIG_6xx) += op_model_7450.o

diff --git a/arch/powerpc/oprofile/common.c b/arch/powerpc/oprofile/common.c
index c77348c5d463df8e26c832fc4169e08f66bfa0b5..bf094c5a4bd957f742ce8f600f61982437169ab9 100644 (file)
--- a/arch/powerpc/oprofile/common.c
+++ b/arch/powerpc/oprofile/common.c
@@ -205,9 +205,6 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
                        ops->sync_stop = model->sync_stop;
                        break;
 #endif
-               case PPC_OPROFILE_RS64:
-                       model = &op_model_rs64;
-                       break;
                case PPC_OPROFILE_POWER4:
                        model = &op_model_power4;
                        break;

diff --git a/arch/powerpc/oprofile/op_model_rs64.c b/arch/powerpc/oprofile/op_model_rs64.c
deleted file mode 100644 (file)
index 7e5b8ed..0000000
--- a/arch/powerpc/oprofile/op_model_rs64.c
+++ /dev/null
@@ -1,222 +0,0 @@
-/*
- * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/oprofile.h>
-#include <linux/smp.h>
-#include <asm/ptrace.h>
-#include <asm/processor.h>
-#include <asm/cputable.h>
-#include <asm/oprofile_impl.h>
-
-#define dbg(args...)
-
-static void ctrl_write(unsigned int i, unsigned int val)
-{
-       unsigned int tmp = 0;
-       unsigned long shift = 0, mask = 0;
-
-       dbg("ctrl_write %d %x\n", i, val);
-
-       switch(i) {
-       case 0:
-               tmp = mfspr(SPRN_MMCR0);
-               shift = 6;
-               mask = 0x7F;
-               break;
-       case 1:
-               tmp = mfspr(SPRN_MMCR0);
-               shift = 0;
-               mask = 0x3F;
-               break;
-       case 2:
-               tmp = mfspr(SPRN_MMCR1);
-               shift = 31 - 4;
-               mask = 0x1F;
-               break;
-       case 3:
-               tmp = mfspr(SPRN_MMCR1);
-               shift = 31 - 9;
-               mask = 0x1F;
-               break;
-       case 4:
-               tmp = mfspr(SPRN_MMCR1);
-               shift = 31 - 14;
-               mask = 0x1F;
-               break;
-       case 5:
-               tmp = mfspr(SPRN_MMCR1);
-               shift = 31 - 19;
-               mask = 0x1F;
-               break;
-       case 6:
-               tmp = mfspr(SPRN_MMCR1);
-               shift = 31 - 24;
-               mask = 0x1F;
-               break;
-       case 7:
-               tmp = mfspr(SPRN_MMCR1);
-               shift = 31 - 28;
-               mask = 0xF;
-               break;
-       }
-
-       tmp = tmp & ~(mask << shift);
-       tmp |= val << shift;
-
-       switch(i) {
-               case 0:
-               case 1:
-                       mtspr(SPRN_MMCR0, tmp);
-                       break;
-               default:
-                       mtspr(SPRN_MMCR1, tmp);
-       }
-
-       dbg("ctrl_write mmcr0 %lx mmcr1 %lx\n", mfspr(SPRN_MMCR0),
-              mfspr(SPRN_MMCR1));
-}
-
-static unsigned long reset_value[OP_MAX_COUNTER];
-
-static int num_counters;
-
-static int rs64_reg_setup(struct op_counter_config *ctr,
-                          struct op_system_config *sys,
-                          int num_ctrs)
-{
-       int i;
-
-       num_counters = num_ctrs;
-
-       for (i = 0; i < num_counters; ++i)
-               reset_value[i] = 0x80000000UL - ctr[i].count;
-
-       /* XXX setup user and kernel profiling */
-       return 0;
-}
-
-static int rs64_cpu_setup(struct op_counter_config *ctr)
-{
-       unsigned int mmcr0;
-
-       /* reset MMCR0 and set the freeze bit */
-       mmcr0 = MMCR0_FC;
-       mtspr(SPRN_MMCR0, mmcr0);
-
-       /* reset MMCR1, MMCRA */
-       mtspr(SPRN_MMCR1, 0);
-
-       if (cpu_has_feature(CPU_FTR_MMCRA))
-               mtspr(SPRN_MMCRA, 0);
-
-       mmcr0 |= MMCR0_FCM1|MMCR0_PMXE|MMCR0_FCECE;
-       /* Only applies to POWER3, but should be safe on RS64 */
-       mmcr0 |= MMCR0_PMC1CE|MMCR0_PMCjCE;
-       mtspr(SPRN_MMCR0, mmcr0);
-
-       dbg("setup on cpu %d, mmcr0 %lx\n", smp_processor_id(),
-           mfspr(SPRN_MMCR0));
-       dbg("setup on cpu %d, mmcr1 %lx\n", smp_processor_id(),
-           mfspr(SPRN_MMCR1));
-
-       return 0;
-}
-
-static int rs64_start(struct op_counter_config *ctr)
-{
-       int i;
-       unsigned int mmcr0;
-
-       /* set the PMM bit (see comment below) */
-       mtmsrd(mfmsr() | MSR_PMM);
-
-       for (i = 0; i < num_counters; ++i) {
-               if (ctr[i].enabled) {
-                       classic_ctr_write(i, reset_value[i]);
-                       ctrl_write(i, ctr[i].event);
-               } else {
-                       classic_ctr_write(i, 0);
-               }
-       }
-
-       mmcr0 = mfspr(SPRN_MMCR0);
-
-       /*
-        * now clear the freeze bit, counting will not start until we
-        * rfid from this excetion, because only at that point will
-        * the PMM bit be cleared
-        */
-       mmcr0 &= ~MMCR0_FC;
-       mtspr(SPRN_MMCR0, mmcr0);
-
-       dbg("start on cpu %d, mmcr0 %x\n", smp_processor_id(), mmcr0);
-       return 0;
-}
-
-static void rs64_stop(void)
-{
-       unsigned int mmcr0;
-
-       /* freeze counters */
-       mmcr0 = mfspr(SPRN_MMCR0);
-       mmcr0 |= MMCR0_FC;
-       mtspr(SPRN_MMCR0, mmcr0);
-
-       dbg("stop on cpu %d, mmcr0 %x\n", smp_processor_id(), mmcr0);
-
-       mb();
-}
-
-static void rs64_handle_interrupt(struct pt_regs *regs,
-                                 struct op_counter_config *ctr)
-{
-       unsigned int mmcr0;
-       int is_kernel;
-       int val;
-       int i;
-       unsigned long pc = mfspr(SPRN_SIAR);
-
-       is_kernel = is_kernel_addr(pc);
-
-       /* set the PMM bit (see comment below) */
-       mtmsrd(mfmsr() | MSR_PMM);
-
-       for (i = 0; i < num_counters; ++i) {
-               val = classic_ctr_read(i);
-               if (val < 0) {
-                       if (ctr[i].enabled) {
-                               oprofile_add_ext_sample(pc, regs, i, is_kernel);
-                               classic_ctr_write(i, reset_value[i]);
-                       } else {
-                               classic_ctr_write(i, 0);
-                       }
-               }
-       }
-
-       mmcr0 = mfspr(SPRN_MMCR0);
-
-       /* reset the perfmon trigger */
-       mmcr0 |= MMCR0_PMXE;
-
-       /*
-        * now clear the freeze bit, counting will not start until we
-        * rfid from this exception, because only at that point will
-        * the PMM bit be cleared
-        */
-       mmcr0 &= ~MMCR0_FC;
-       mtspr(SPRN_MMCR0, mmcr0);
-}
-
-struct op_powerpc_model op_model_rs64 = {
-       .reg_setup              = rs64_reg_setup,
-       .cpu_setup              = rs64_cpu_setup,
-       .start                  = rs64_start,
-       .stop                   = rs64_stop,
-       .handle_interrupt       = rs64_handle_interrupt,
-};