KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
endif
-LINUX_VERSION-5.4 = .118
+LINUX_VERSION-5.4 = .119
LINUX_VERSION-5.10 = .39
-LINUX_KERNEL_HASH-5.4.118 = d970509c274fd2f5a9257a63c56f7a8b3e50ec12015bd6864dc4b76b38dc821b
+LINUX_KERNEL_HASH-5.4.119 = 71e7decf1e8149a8aed88d30df4f2a62a6c6b168111de6b261685ac7c0ecb2a0
LINUX_KERNEL_HASH-5.10.39 = 5738a515ca97853481767360c568eae46c8d777d98a69e018a3299baa6b3f614
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
#define USB_VENDOR_ID_BELKIN 0x050d
#define USB_DEVICE_ID_FLIP_KVM 0x3201
-@@ -1258,6 +1261,9 @@
+@@ -1259,6 +1262,9 @@
#define USB_VENDOR_ID_XAT 0x2505
#define USB_DEVICE_ID_XAT_CSR 0x0220
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
-@@ -708,7 +708,6 @@ config X86_SUPPORTS_MEMORY_FAILURE
+@@ -709,7 +709,6 @@ config X86_SUPPORTS_MEMORY_FAILURE
config STA2X11
bool "STA2X11 Companion Chip Support"
depends on X86_32_NON_STANDARD && PCI
default:
return -EINVAL;
}
-@@ -2423,6 +2429,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(s
+@@ -2431,6 +2437,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(s
case V4L2_CTRL_TYPE_VP8_FRAME_HEADER:
elem_size = sizeof(struct v4l2_ctrl_vp8_frame_header);
break;
default:
if (type < V4L2_CTRL_COMPOUND_TYPES)
elem_size = sizeof(s32);
-@@ -4087,6 +4096,18 @@ int __v4l2_ctrl_s_ctrl_string(struct v4l
+@@ -4098,6 +4107,18 @@ int __v4l2_ctrl_s_ctrl_string(struct v4l
}
EXPORT_SYMBOL(__v4l2_ctrl_s_ctrl_string);
default:
return -EINVAL;
}
-@@ -2434,6 +2532,15 @@ static struct v4l2_ctrl *v4l2_ctrl_new(s
+@@ -2442,6 +2540,15 @@ static struct v4l2_ctrl *v4l2_ctrl_new(s
case V4L2_CTRL_TYPE_VP8_FRAME_HEADER:
elem_size = sizeof(struct v4l2_ctrl_vp8_frame_header);
break;
case V4L2_CTRL_TYPE_AREA:
area = p;
if (!area->width || !area->height)
-@@ -2541,6 +2548,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(s
+@@ -2549,6 +2556,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(s
case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS:
elem_size = sizeof(struct v4l2_ctrl_hevc_slice_params);
break;
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
-@@ -3115,6 +3115,7 @@ static int __spi_validate_bits_per_word(
+@@ -3110,6 +3110,7 @@ static int __spi_validate_bits_per_word(
*/
int spi_setup(struct spi_device *spi)
{
unsigned bad_bits, ugly_bits;
int status;
-@@ -3132,6 +3133,14 @@ int spi_setup(struct spi_device *spi)
+@@ -3127,6 +3128,14 @@ int spi_setup(struct spi_device *spi)
(SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
return -EINVAL;
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
-@@ -3127,8 +3127,8 @@ int spi_setup(struct spi_device *spi)
+@@ -3122,8 +3122,8 @@ int spi_setup(struct spi_device *spi)
if (ctlr->use_gpio_descriptors && ctlr->cs_gpiods &&
ctlr->cs_gpiods[spi->chip_select] && !(spi->mode & SPI_CS_HIGH)) {
#define dprintk(vdev, fmt, arg...) do { \
if (!WARN_ON(!(vdev)) && ((vdev)->dev_debug & V4L2_DEV_DEBUG_CTRL)) \
-@@ -4578,3 +4579,42 @@ __poll_t v4l2_ctrl_poll(struct file *fil
+@@ -4589,3 +4590,42 @@ __poll_t v4l2_ctrl_poll(struct file *fil
return 0;
}
EXPORT_SYMBOL(v4l2_ctrl_poll);
nand_writereg(ctrl, acc_control_offs, tmp);
brcmnand_set_sector_size_1k(host, cfg->sector_size_1k);
-@@ -2524,6 +2589,8 @@ const struct dev_pm_ops brcmnand_pm_ops
+@@ -2530,6 +2595,8 @@ const struct dev_pm_ops brcmnand_pm_ops
EXPORT_SYMBOL_GPL(brcmnand_pm_ops);
static const struct of_device_id brcmnand_of_match[] = {
+++ /dev/null
-From cf0d2fbaae9e962d91a321de75e0d4f9f9ccbdfe Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Thu, 21 Jan 2021 18:17:37 +0100
-Subject: [PATCH] nand: brcmnand: fix OOB R/W with Hamming ECC
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Hamming ECC doesn't cover the OOB data, so reading or writing OOB shall
-always be done without ECC enabled.
-This is a problem when adding JFFS2 cleanmarkers to erased blocks. When JFFS2
-clenmarkers are added to the OOB with ECC enabled, OOB bytes will be changed
-from ff ff ff to 00 00 00, reporting incorrect ECC errors.
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
----
- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
-+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
-@@ -2426,6 +2426,12 @@ static int brcmnand_attach_chip(struct n
-
- ret = brcmstb_choose_ecc_layout(host);
-
-+ /* If OOB is written with ECC enabled it will cause ECC errors */
-+ if (is_hamming_ecc(host->ctrl, &host->hwcfg)) {
-+ chip->ecc.write_oob = brcmnand_write_oob_raw;
-+ chip->ecc.read_oob = brcmnand_read_oob_raw;
-+ }
-+
- return ret;
- }
-
+++ /dev/null
-From 3007b05df4301aad179acc6ca1c3645785576df6 Mon Sep 17 00:00:00 2001
-From: Alexander Lobakin <alobakin@pm.me>
-Date: Mon, 19 Apr 2021 12:53:06 +0000
-Subject: gro: fix napi_gro_frags() Fast GRO breakage due to IP
- alignment check
-
-Commit 7ad18ff6449cbd6beb26b53128ddf56d2685aa93 upstream.
-
-Commit 38ec4944b593 ("gro: ensure frag0 meets IP header alignment")
-did the right thing, but missed the fact that napi_gro_frags() logics
-calls for skb_gro_reset_offset() *before* pulling Ethernet header
-to the skb linear space.
-That said, the introduced check for frag0 address being aligned to 4
-always fails for it as Ethernet header is obviously 14 bytes long,
-and in case with NET_IP_ALIGN its start is not aligned to 4.
-
-Fix this by adding @nhoff argument to skb_gro_reset_offset() which
-tells if an IP header is placed right at the start of frag0 or not.
-This restores Fast GRO for napi_gro_frags() that became very slow
-after the mentioned commit, and preserves the introduced check to
-avoid silent unaligned accesses.
-
-From v1 [0]:
- - inline tiny skb_gro_reset_offset() to let the code be optimized
- more efficively (esp. for the !NET_IP_ALIGN case) (Eric);
- - pull in Reviewed-by from Eric.
-
-[0] https://lore.kernel.org/netdev/20210418114200.5839-1-alobakin@pm.me
-
-Fixes: 38ec4944b593 ("gro: ensure frag0 meets IP header alignment")
-Reviewed-by: Eric Dumazet <edumazet@google.com>
-Signed-off-by: Alexander Lobakin <alobakin@pm.me>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- net/core/dev.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/net/core/dev.c
-+++ b/net/core/dev.c
-@@ -5395,7 +5395,7 @@ static struct list_head *gro_list_prepar
- return head;
- }
-
--static void skb_gro_reset_offset(struct sk_buff *skb)
-+static inline void skb_gro_reset_offset(struct sk_buff *skb, u32 nhoff)
- {
- const struct skb_shared_info *pinfo = skb_shinfo(skb);
- const skb_frag_t *frag0 = &pinfo->frags[0];
-@@ -5407,7 +5407,7 @@ static void skb_gro_reset_offset(struct
- if (skb_mac_header(skb) == skb_tail_pointer(skb) &&
- pinfo->nr_frags &&
- !PageHighMem(skb_frag_page(frag0)) &&
-- (!NET_IP_ALIGN || !(skb_frag_off(frag0) & 3))) {
-+ (!NET_IP_ALIGN || !((skb_frag_off(frag0) + nhoff) & 3))) {
- NAPI_GRO_CB(skb)->frag0 = skb_frag_address(frag0);
- NAPI_GRO_CB(skb)->frag0_len = min_t(unsigned int,
- skb_frag_size(frag0),
-@@ -5640,7 +5640,7 @@ gro_result_t napi_gro_receive(struct nap
- skb_mark_napi_id(skb, napi);
- trace_napi_gro_receive_entry(skb);
-
-- skb_gro_reset_offset(skb);
-+ skb_gro_reset_offset(skb, 0);
-
- ret = napi_skb_finish(napi, skb, dev_gro_receive(napi, skb));
- trace_napi_gro_receive_exit(ret);
-@@ -5733,7 +5733,7 @@ static struct sk_buff *napi_frags_skb(st
- napi->skb = NULL;
-
- skb_reset_mac_header(skb);
-- skb_gro_reset_offset(skb);
-+ skb_gro_reset_offset(skb, hlen);
-
- if (unlikely(skb_gro_header_hard(skb, hlen))) {
- eth = skb_gro_header_slow(skb, hlen, 0);
}
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
-@@ -409,6 +409,9 @@ static struct pernet_operations ip_rt_pr
+@@ -410,6 +410,9 @@ static struct pernet_operations ip_rt_pr
static int __init ip_rt_proc_init(void)
{
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
-@@ -1050,6 +1050,44 @@ out_unlock:
+@@ -1053,6 +1053,44 @@ out_unlock:
}
EXPORT_SYMBOL_GPL(get_mtd_device_nm);
+
--- a/arch/mips/pci/pci-legacy.c
+++ b/arch/mips/pci/pci-legacy.c
-@@ -308,3 +308,30 @@ char *__init pcibios_setup(char *str)
+@@ -313,3 +313,30 @@ char *__init pcibios_setup(char *str)
return pcibios_plat_setup(str);
return str;
}
--- a/drivers/net/phy/intel-xway.c
+++ b/drivers/net/phy/intel-xway.c
-@@ -145,6 +145,51 @@
+@@ -157,6 +157,51 @@
#define PHY_ID_PHY11G_VR9_1_2 0xD565A409
#define PHY_ID_PHY22F_VR9_1_2 0xD565A419
static int xway_gphy_config_init(struct phy_device *phydev)
{
int err;
-@@ -183,6 +228,7 @@ static int xway_gphy_config_init(struct
+@@ -204,6 +249,7 @@ static int xway_gphy_config_init(struct
phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2H, ledxh);
phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2L, ledxl);
+++ /dev/null
---- a/arch/mips/pci/pci-mt7620.c
-+++ b/arch/mips/pci/pci-mt7620.c
-@@ -32,6 +32,7 @@
- #define PPLL_CFG1 0x9c
-
- #define PPLL_DRV 0xa0
-+#define PPLL_LD BIT(23)
- #define PDRV_SW_SET BIT(31)
- #define LC_CKDRVPD BIT(19)
- #define LC_CKDRVOHZ BIT(18)
-@@ -239,8 +240,8 @@ static int mt7620_pci_hw_init(struct pla
- rt_sysc_m32(0, RALINK_PCIE0_CLK_EN, RALINK_CLKCFG1);
- mdelay(100);
-
-- if (!(rt_sysc_r32(PPLL_CFG1) & PDRV_SW_SET)) {
-- dev_err(&pdev->dev, "MT7620 PPLL unlock\n");
-+ if (!(rt_sysc_r32(PPLL_CFG1) & PPLL_LD)) {
-+ dev_err(&pdev->dev, "MT7620 PPLL is unlocked, aborting init\n");
- reset_control_assert(rstpcie0);
- rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1);
- return -1;
projects / openwrt / staging / ynezz.git / commitdiff