mac80211: ath9k: fix OTP register offsets for AR9340

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 34605

diff --git a/package/mac80211/patches/301-pending-ath9k-ar9003-fix-OTP-register-offsets-for-AR9340.patch b/package/mac80211/patches/301-pending-ath9k-ar9003-fix-OTP-register-offsets-for-AR9340.patch
new file mode 100644 (file)
index 0000000..0519705
--- /dev/null
+++ b/package/mac80211/patches/301-pending-ath9k-ar9003-fix-OTP-register-offsets-for-AR9340.patch
@@ -0,0 +1,73 @@
+From b4d6c33df61d95fa1e223101ca345f4c797e8823 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Sun, 9 Dec 2012 23:37:13 +0100
+Subject: [PATCH] ath9k: ar9003: fix OTP register offsets for AR9340
+
+Trying to access the OTP memory on the AR9340
+causes a data bus error like this:
+
+  Data bus error, epc == 86e84164, ra == 86e84164
+  Oops[#1]:
+  Cpu 0
+  $ 0   : 00000000 00000061 deadc0de 00000000
+  $ 4   : b8115f18 00015f18 00000007 00000004
+  $ 8   : 00000001 7c7c3c7c 7c7c7c7c 7c7c7c7c
+  $12   : 7c7c3c7c 001f0041 00000000 7c7c7c3c
+  $16   : 86ee0000 00015f18 00000000 00000007
+  $20   : 00000004 00000064 00000004 86d71c44
+  $24   : 00000000 86e6ca00
+  $28   : 86d70000 86d71b20 86ece0c0 86e84164
+  Hi    : 00000000
+  Lo    : 00000064
+  epc   : 86e84164 ath9k_hw_wait+0x58/0xb0 [ath9k_hw]
+      Tainted: G           O
+  ra    : 86e84164 ath9k_hw_wait+0x58/0xb0 [ath9k_hw]
+  Status: 1100d403    KERNEL EXL IE
+  Cause : 4080801c
+  PrId  : 0001974c (MIPS 74Kc)
+  Modules linked in: ath9k(O+) ath9k_common(O) ath9k_hw(O) ath(O) ar934x_nfc
+  mac80211(O) usbcore usb_common scsi_mod nls_base nand nand_ecc nand_ids
+  crc_ccitt cfg80211(O) compat(O) arc4 aes_generic crypto_blkcipher cryptomgr
+  aead crypto_hash crypto_algapi ledtrig_timer ledtrig_default_on leds_gpio
+  Process insmod (pid: 459, threadinfo=86d70000, task=87942140, tls=779ac440)
+  Stack : 802fb500 000200da 804db150 804e0000 87816130 86ee0000 00010000 86d71b88
+          86d71bc0 00000004 00000003 86e9fcd0 80305300 0002c0d0 86e74c50 800b4c20
+          000003e8 00000001 00000000 86ee0000 000003ff 86e9fd64 80305300 80123938
+          fffffffc 00000004 000058bc 00000000 86ea0000 86ee0000 000001ff 878d6000
+          99999999 86e9fdc0 86ee0fcc 86e9e664 0000c0d0 86ee0000 0000700000007000
+          ...
+  Call Trace:
+  [<86e84164>] ath9k_hw_wait+0x58/0xb0 [ath9k_hw]
+  [<86e9fcd0>] ath9k_hw_setup_statusring+0x16b8/0x1c7c [ath9k_hw]
+
+  Code: 0000a812  0040f809  00000000 <00531024> 1054000b  24020001  0c05b5dc  2404000a  26520001
+
+The cause of the error is that the OTP register
+offsets are different on the AR9340 than the
+actually used values.
+
+Cc: <stable@vger.kernel.org> # 3.0+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+---
+ drivers/net/wireless/ath/ath9k/ar9003_eeprom.h |    6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
+@@ -68,13 +68,13 @@
+ #define AR9300_BASE_ADDR 0x3ff
+ #define AR9300_BASE_ADDR_512 0x1ff
+ 
+-#define AR9300_OTP_BASE                       0x14000
+-#define AR9300_OTP_STATUS             0x15f18
++#define AR9300_OTP_BASE                       (AR_SREV_9340(ah) ? 0x30000 : 0x14000)
++#define AR9300_OTP_STATUS             (AR_SREV_9340(ah) ? 0x30018 : 0x15f18)
+ #define AR9300_OTP_STATUS_TYPE                0x7
+ #define AR9300_OTP_STATUS_VALID               0x4
+ #define AR9300_OTP_STATUS_ACCESS_BUSY 0x2
+ #define AR9300_OTP_STATUS_SM_BUSY     0x1
+-#define AR9300_OTP_READ_DATA          0x15f1c
++#define AR9300_OTP_READ_DATA          (AR_SREV_9340(ah) ? 0x3001c : 0x15f1c)
+ 
+ enum targetPowerHTRates {
+       HT_TARGET_RATE_0_8_16,