arm64: dts: ti: k3-j721e: Add interrupt controllers in main domain
authorLokesh Vutla <lokeshvutla@ti.com>
Fri, 14 Jun 2019 14:50:00 +0000 (20:20 +0530)
committerTero Kristo <t-kristo@ti.com>
Wed, 19 Jun 2019 08:59:49 +0000 (11:59 +0300)
Main domain in J721E has the following interrupt controller instances:
- Main Domain GPIO Interrupt router connected to gpio in main domain.
- Under the Main Domain Navigator Subsystem(NAVSS)
- Main Navss Interrupt Router connected to main navss inta and mailboxes.
- Main Navss Interrupt Aggregator connected to main domain UDMASS

Add DT nodes for the interrupt controllers available in main domain.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi

index 36c51ff9a898ff51aa656c8dc4ec8ded0fa24dc1..a01308142f77d1ed1b6702f27b79ff47af1681b3 100644 (file)
                #iommu-cells = <1>;
        };
 
+       main_gpio_intr: interrupt-controller0 {
+               compatible = "ti,sci-intr";
+               ti,intr-trigger-type = <1>;
+               interrupt-controller;
+               interrupt-parent = <&gic500>;
+               #interrupt-cells = <2>;
+               ti,sci = <&dmsc>;
+               ti,sci-dst-id = <14>;
+               ti,sci-rm-range-girq = <0x1>;
+       };
+
        cbass_main_navss: interconnect0 {
                compatible = "simple-bus";
                #address-cells = <2>;
                        ti,sci-dst-id = <14>;
                        ti,sci-rm-range-girq = <0>, <2>;
                };
+
+               main_udmass_inta: interrupt-controller@33d00000 {
+                       compatible = "ti,sci-inta";
+                       reg = <0x0 0x33d00000 0x0 0x100000>;
+                       interrupt-controller;
+                       interrupt-parent = <&main_navss_intr>;
+                       msi-controller;
+                       ti,sci = <&dmsc>;
+                       ti,sci-dev-id = <209>;
+                       ti,sci-rm-range-vint = <0xa>;
+                       ti,sci-rm-range-global-event = <0xd>;
+               };
        };
 
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