drm/amdgpu: fix CG enabling hang with gfxoff enabled

After defer the execution of clockgating enabling, at that time, gfx already
enter into "off" state. Howerver, clockgating enabling will use MMIO to access
the gfx registers, then get the gfx hung.

So here we should move the gfx powergating and gfxoff enabling behavior at the
end of initialization behind clockgating.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Cc: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 290e279abf0dcc862b636025ee48d256fb737f02..3317d1536f4fc352247756e3c650d72c9236916b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1730,6 +1730,18 @@ static int amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
                        }
                }
        }
+
+       if (adev->powerplay.pp_feature & PP_GFXOFF_MASK) {
+               /* enable gfx powergating */
+               amdgpu_device_ip_set_powergating_state(adev,
+                                                      AMD_IP_BLOCK_TYPE_GFX,
+                                                      AMD_PG_STATE_GATE);
+               /* enable gfxoff */
+               amdgpu_device_ip_set_powergating_state(adev,
+                                                      AMD_IP_BLOCK_TYPE_SMC,
+                                                      AMD_PG_STATE_GATE);
+       }
+
        return 0;
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 4f7a72dd37344014d644db7fb3699d7028036bf5..95f2773dc11d72abc0ede45d379be2b683c3eca3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3405,11 +3405,6 @@ static int gfx_v9_0_late_init(void *handle)
        if (r)
                return r;
 
-       r = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_GFX,
-                                                  AMD_PG_STATE_GATE);
-       if (r)
-               return r;
-
        return 0;
 }
 

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index b493369e6d0f9daac4bf28777b6461917937eac9..d0e6e2dd6bc6d2392cc9e3aca3508a4c13bf9de6 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -245,7 +245,7 @@ static int pp_set_powergating_state(void *handle,
        }
 
        if (hwmgr->hwmgr_func->enable_per_cu_power_gating == NULL) {
-               pr_info("%s was not implemented.\n", __func__);
+               pr_debug("%s was not implemented.\n", __func__);
                return 0;
        }
 

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
index 6a6367190bedef1e7a014ab0362c5caf88f0309a..d4bc83e813896903b33b22fca4dbed1b88b2c159 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
@@ -313,7 +313,7 @@ static int smu10_disable_gfx_off(struct pp_hwmgr *hwmgr)
 
 static int smu10_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
 {
-       return smu10_disable_gfx_off(hwmgr);
+       return 0;
 }
 
 static int smu10_enable_gfx_off(struct pp_hwmgr *hwmgr)
@@ -328,7 +328,7 @@ static int smu10_enable_gfx_off(struct pp_hwmgr *hwmgr)
 
 static int smu10_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
 {
-       return smu10_enable_gfx_off(hwmgr);
+       return 0;
 }
 
 static int smu10_gfx_off_control(struct pp_hwmgr *hwmgr, bool enable)