ARM: dts: dra7xx: Add u-boot specific property for PCF8575 nodes

PCF8575 does not have any registers hence, offset field needs to be
ignored for i2c read/write. Therefore populate u-boot,i2c-offset-len
with 0 in PCF8575 DT nodes.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts
index 8b77a761d2117d1eac1473248f116dfb21d44301..06b7b367e4d5d9fe66fd9c5a3401a6bfac70e694 100644 (file)
--- a/arch/arm/dts/dra7-evm.dts
+++ b/arch/arm/dts/dra7-evm.dts
@@ -415,6 +415,7 @@
                interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
                interrupt-controller;
                #interrupt-cells = <2>;
+               u-boot,i2c-offset-len = <0>;
        };
 
 };

diff --git a/arch/arm/dts/dra72-evm.dts b/arch/arm/dts/dra72-evm.dts
index c7c5d40adac72f6cb2aaefbe246cc1f824302843..277745fec998657f5935e8e4fa3d6f3117cb161b 100644 (file)
--- a/arch/arm/dts/dra72-evm.dts
+++ b/arch/arm/dts/dra72-evm.dts
@@ -348,6 +348,7 @@
                interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
                interrupt-controller;
                #interrupt-cells = <2>;
+               u-boot,i2c-offset-len = <0>;
        };
 };
 
@@ -369,6 +370,7 @@
                 * VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6
                 */
                lines-initial-states = <0x0f2b>;
+               u-boot,i2c-offset-len = <0>;
        };
 };