--- /dev/null
+CONFIG_ADM8668=y
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
+CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARM_AMBA=y
+# CONFIG_ARM_SP805_WATCHDOG is not set
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CMDLINE="console=ttyS0 earlyprintk"
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERRIDE=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_MIPS32_R1=y
+CONFIG_CPU_MIPSR1=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CSRC_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+# CONFIG_DE2104X is not set
+# CONFIG_DE4X5 is not set
+CONFIG_DECOMPRESS_LZMA=y
+# CONFIG_DM9102 is not set
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_EEPROM_93CX6=m
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IRQ_WORK=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HW_HAS_PCI=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQ_CPU=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_MIPS=y
+# CONFIG_MIPS_O32_FP64_SUPPORT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_MIPS_MACHINE is not set
+CONFIG_MIPS_MT_DISABLED=y
+CONFIG_MTD_ADM8668_NOR=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NET_TULIP=y
+CONFIG_NO_EXCEPT_FILL=y
+CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PERF_USE_VMALLOC=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250 is not set
+CONFIG_SERIAL_AMBA_PL010=y
+CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
+CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
+CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
+# CONFIG_SERIAL_AMBA_PL011 is not set
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_TULIP=y
+CONFIG_TULIP_NAPI=y
+# CONFIG_TULIP_NAPI_HW_MITIGATION is not set
+# CONFIG_TULIP_PCI is not set
+CONFIG_TULIP_PLATFORM=y
+# CONFIG_ULI526X is not set
+CONFIG_USB_ARCH_HAS_XHCI=y
+# CONFIG_USB_HCD_BCMA is not set
+# CONFIG_USB_HCD_SSB is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_WINBOND_840 is not set
+CONFIG_ZONE_DMA_FLAG=0
--- /dev/null
+config ARM_AMBA
+ def_bool y
--- /dev/null
+#
+# something witty --neutronscott
+#
+
+obj-y := irq.o prom.o platform.o gpio.o \
+ setup.o clock.o time.o early_printk.o \
--- /dev/null
+#
+# Infineon ADM8668 WildPass
+#
+platform-$(CONFIG_ADM8668) += adm8668/
+cflags-$(CONFIG_ADM8668) += -I$(srctree)/arch/mips/include/asm/mach-adm8668
+load-$(CONFIG_ADM8668) += 0xffffffff80002000
--- /dev/null
+/*
+ * ADM8668 minimal clock support
+ *
+ * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
+ *
+ * Licensed under the terms of the GPLv2
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+
+#include <adm8668.h>
+
+struct clk {
+ unsigned long rate;
+};
+
+static struct clk uart_clk = {
+ .rate = 62500000,
+};
+
+static struct clk sys_clk;
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+ const char *lookup = id;
+
+ if (dev)
+ lookup = dev_name(dev);
+
+ if (!strcmp(lookup, "apb:uart0"))
+ return &uart_clk;
+ if (!strcmp(lookup, "sys"))
+ return &sys_clk;
+
+ return ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+int clk_enable(struct clk *clk)
+{
+ return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+ return clk->rate;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
+
+void __init adm8668_init_clocks(void)
+{
+ u32 adj;
+
+ /* adjustable clock selection
+ * CR3 bit 14~11, 0000 -> 175MHz, 0001 -> 180MHz, etc...
+ */
+ adj = (ADM8668_CONFIG_REG(ADM8668_CR3) >> 11) & 0xf;
+ sys_clk.rate = 175000000 + (adj * 5000000);
+
+ pr_info("ADM8668 CPU clock: %lu MHz\n", sys_clk.rate / 1000000);
+}
--- /dev/null
+#include <linux/io.h>
+#include <linux/amba/serial.h>
+#include <adm8668.h>
+
+#define UART_READ(r) \
+ __raw_readl((void __iomem *)(KSEG1ADDR(ADM8668_UART0_BASE) + (r)))
+
+#define UART_WRITE(v, r) \
+ __raw_writel((v), (void __iomem *)(KSEG1ADDR(ADM8668_UART0_BASE) + (r)))
+
+void prom_putchar(char c)
+{
+ UART_WRITE(c, UART01x_DR);
+ while ((UART_READ(UART01x_FR) & UART01x_FR_TXFF) != 0)
+ ;
+}
--- /dev/null
+/*
+ * Infineon/ADMTek ADM8668 WildPass GPIO support
+ *
+ * Copyright (C) 2012 Florian Fainelli <florian@openwrt.org>
+ *
+ * Licensed under the terms of GPLv2.
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+
+#include <adm8668.h>
+
+#define GPIO_MASK 0x3f
+
+#define GPIO_IN_OFS 0
+#define GPIO_OUT_OFS 6
+#define GPIO_OE_OFS 12
+
+struct adm8668_gpio_chip {
+ void __iomem *base;
+ struct gpio_chip chip;
+};
+
+static int adm8668_gpio_dir_out(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ struct adm8668_gpio_chip *c =
+ container_of(chip, struct adm8668_gpio_chip, chip);
+ u32 mask;
+
+ /* clear input, set output enable and output value */
+ mask = __raw_readl(c->base);
+ mask &= ~(1 << offset);
+ mask |= (1 << (offset + GPIO_OE_OFS));
+ if (value)
+ mask |= (1 << (offset + GPIO_OUT_OFS));
+ else
+ mask &= ~(1 << (offset + GPIO_OUT_OFS));
+ __raw_writel(mask, c->base);
+
+ return 0;
+}
+
+static int adm8668_gpio_dir_in(struct gpio_chip *chip,
+ unsigned offset)
+{
+ struct adm8668_gpio_chip *c =
+ container_of(chip, struct adm8668_gpio_chip, chip);
+ u32 mask;
+
+ mask = __raw_readl(c->base);
+ mask &= ~(((1 << (offset + GPIO_OE_OFS)) | (1 << (offset + GPIO_OUT_OFS))));
+ mask |= (1 << offset);
+ __raw_writel(mask, c->base);
+
+ return 0;
+}
+
+static void adm8668_gpio_set(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ struct adm8668_gpio_chip *c =
+ container_of(chip, struct adm8668_gpio_chip, chip);
+ u32 mask;
+
+ mask = __raw_readl(c->base);
+ if (value)
+ mask |= (1 << (offset + GPIO_OUT_OFS));
+ else
+ mask &= ~(1 << (offset + GPIO_OUT_OFS));
+ __raw_writel(mask, c->base);
+}
+
+static int adm8668_gpio_get(struct gpio_chip *chip,
+ unsigned offset)
+{
+ struct adm8668_gpio_chip *c =
+ container_of(chip, struct adm8668_gpio_chip, chip);
+ u32 value;
+
+ value = __raw_readl(c->base) & GPIO_MASK;
+
+ return value & (1 << offset);
+}
+
+static struct adm8668_gpio_chip adm8668_gpio_cpu = {
+ .base = (void __iomem *)KSEG1ADDR(ADM8668_CONFIG_BASE + CRGPIO_REG),
+ .chip = {
+ .label = "adm8668-cpu-gpio",
+ .direction_output = adm8668_gpio_dir_out,
+ .direction_input = adm8668_gpio_dir_in,
+ .set = adm8668_gpio_set,
+ .get = adm8668_gpio_get,
+ .ngpio = 6,
+ },
+};
+
+static struct adm8668_gpio_chip adm8668_gpio_wlan = {
+ .base = (void __iomem *)KSEG1ADDR(ADM8668_WLAN_BASE + GPIO_REG),
+ .chip = {
+ .label = "adm8668-wlan-gpio",
+ .direction_output = adm8668_gpio_dir_out,
+ .direction_input = adm8668_gpio_dir_in,
+ .set = adm8668_gpio_set,
+ .get = adm8668_gpio_get,
+ .ngpio = 6,
+ .base = 6,
+ },
+};
+
+static int __init adm8668_gpio_init(void)
+{
+ int ret;
+
+ ret = gpiochip_add(&adm8668_gpio_cpu.chip);
+ if (ret)
+ return ret;
+
+ return gpiochip_add(&adm8668_gpio_wlan.chip);
+}
+arch_initcall(adm8668_gpio_init);
--- /dev/null
+/*
+ * Copyright (C) 2010 Scott Nicholas <neutronscott@scottn.us>
+ * Copyright (C) 2012 Florian Fainelli <florian@openwrt.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/pm.h>
+#include <linux/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/irq_cpu.h>
+#include <asm/irq.h>
+#include <adm8668.h>
+
+/* interrupt controller */
+#define IRQ_STATUS_REG 0x00 /* Read */
+#define IRQ_ENABLE_REG 0x08 /* Read/Write */
+#define IRQ_DISABLE_REG 0x0C /* Write */
+
+#define IRQ_MASK 0xffff
+
+static inline void intc_write_reg(u32 val, unsigned int reg)
+{
+ void __iomem *base = (void __iomem *)KSEG1ADDR(ADM8668_INTC_BASE);
+
+ __raw_writel(val, base + reg);
+}
+
+static inline u32 intc_read_reg(unsigned int reg)
+{
+ void __iomem *base = (void __iomem *)KSEG1ADDR(ADM8668_INTC_BASE);
+
+ return __raw_readl(base + reg);
+}
+
+static void adm8668_irq_cascade(void)
+{
+ int irq;
+ u32 intsrc;
+
+ intsrc = intc_read_reg(IRQ_STATUS_REG) & IRQ_MASK;
+ if (intsrc) {
+ irq = fls(intsrc) - 1;
+ do_IRQ(irq);
+ } else
+ spurious_interrupt();
+}
+
+/*
+ * System irq dispatch
+ */
+void plat_irq_dispatch(void)
+{
+ unsigned int pending;
+
+ pending = read_c0_cause() & read_c0_status() & ST0_IM;
+
+ /* timer interrupt, that we renumbered */
+ if (pending & STATUSF_IP7)
+ do_IRQ(MIPS_CPU_IRQ_BASE + 7);
+ else if (pending & STATUSF_IP2)
+ adm8668_irq_cascade();
+ else
+ spurious_interrupt();
+}
+
+/*
+ * enable 8668 irq
+ */
+static void enable_adm8668_irq(struct irq_data *d)
+{
+ intc_write_reg((1 << d->irq), IRQ_ENABLE_REG);
+}
+
+
+static void ack_adm8668_irq(struct irq_data *d)
+{
+ intc_write_reg((1 << d->irq), IRQ_DISABLE_REG);
+}
+
+/*
+ * system irq type
+ */
+
+static struct irq_chip adm8668_irq_type = {
+ .name = "adm8668",
+ .irq_ack = ack_adm8668_irq,
+ .irq_mask = ack_adm8668_irq,
+ .irq_unmask = enable_adm8668_irq
+};
+
+/*
+ * irq init
+ */
+static void __init init_adm8668_irqs(void)
+{
+ int i;
+
+ /* disable all interrupts for the moment */
+ intc_write_reg(IRQ_MASK, IRQ_DISABLE_REG);
+
+ for (i = 0; i <= ADM8668_IRQ_MAX; i++)
+ irq_set_chip_and_handler(i, &adm8668_irq_type,
+ handle_level_irq);
+
+ /* hw0 is where our interrupts are uh.. interrupted at. */
+ set_c0_status(IE_IRQ0);
+}
+
+/*
+ * system init
+ */
+void __init arch_init_irq(void)
+{
+ mips_cpu_irq_init();
+ init_adm8668_irqs();
+}
--- /dev/null
+/*
+ * Copyright (C) 2010 Scott Nicholas <neutronscott@scottn.us>
+ * Copyright (C) 2012 Florian Fainelli <florian@openwrt.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/tulip.h>
+#include <linux/usb/ehci_pdriver.h>
+#include <linux/mtd/physmap.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/ioport.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/serial.h>
+
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <adm8668.h>
+
+#define ADM8868_UBOOT_ENV 0x20000
+#define ADM8868_UBOOT_WAN_MAC 0x5ac
+#define ADM8868_UBOOT_LAN_MAC 0x404
+
+static void adm8668_uart_set_mctrl(struct amba_device *dev,
+ void __iomem *base,
+ unsigned int mcrtl)
+{
+}
+
+static struct amba_pl010_data adm8668_uart0_data = {
+ .set_mctrl = adm8668_uart_set_mctrl,
+};
+
+static struct amba_device adm8668_uart0_device = {
+ .dev = {
+ .init_name = "apb:uart0",
+ .platform_data = &adm8668_uart0_data,
+ },
+ .res = {
+ .start = ADM8668_UART0_BASE,
+ .end = ADM8668_UART0_BASE + 0xF,
+ .flags = IORESOURCE_MEM,
+ },
+ .irq = {
+ ADM8668_UART0_IRQ,
+ -1
+ },
+ .periphid = 0x0041010,
+};
+
+static struct resource eth0_resources[] = {
+ {
+ .start = ADM8668_LAN_BASE,
+ .end = ADM8668_LAN_BASE + 256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = ADM8668_LAN_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct tulip_platform_data eth0_pdata = {
+ .chip_id = ADM8668,
+};
+
+static struct platform_device adm8668_eth0_device = {
+ .name = "tulip",
+ .id = 0,
+ .resource = eth0_resources,
+ .num_resources = ARRAY_SIZE(eth0_resources),
+ .dev.platform_data = ð0_pdata,
+};
+
+static struct resource eth1_resources[] = {
+ {
+ .start = ADM8668_WAN_BASE,
+ .end = ADM8668_WAN_BASE + 256,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = ADM8668_WAN_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct tulip_platform_data eth1_pdata = {
+ .chip_id = ADM8668,
+};
+
+static struct platform_device adm8668_eth1_device = {
+ .name = "tulip",
+ .id = 1,
+ .resource = eth1_resources,
+ .num_resources = ARRAY_SIZE(eth1_resources),
+ .dev.platform_data = ð1_pdata,
+};
+
+static struct resource usb_resources[] = {
+ {
+ .start = ADM8668_USB_BASE,
+ .end = ADM8668_USB_BASE + 0x1FFFFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = ADM8668_USB_IRQ,
+ .end = ADM8668_USB_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct usb_ehci_pdata usb_pdata = {
+ .caps_offset = 0x100,
+ .has_tt = 1,
+};
+
+static struct platform_device adm8668_usb_device = {
+ .name = "ehci-platform",
+ .id = -1,
+ .resource = usb_resources,
+ .num_resources = ARRAY_SIZE(usb_resources),
+ .dev.platform_data = &usb_pdata,
+};
+
+static struct platform_device *adm8668_devs[] = {
+ &adm8668_eth0_device,
+ &adm8668_eth1_device,
+ &adm8668_usb_device,
+};
+
+static void adm8668_fetch_mac(int unit)
+{
+ u8 *mac;
+ u32 offset;
+ struct tulip_platform_data *pdata;
+
+ switch (unit) {
+ case -1:
+ case 0:
+ offset = ADM8868_UBOOT_LAN_MAC;
+ pdata = ð0_pdata;
+ break;
+ case 1:
+ offset = ADM8868_UBOOT_WAN_MAC;
+ pdata = ð1_pdata;
+ break;
+ default:
+ pr_err("unsupported ethernet unit: %d\n", unit);
+ return;
+ }
+
+ mac = (u8 *)(KSEG1ADDR(ADM8668_SMEM1_BASE) + ADM8868_UBOOT_ENV + offset);
+
+ memcpy(pdata->mac, mac, sizeof(pdata->mac));
+}
+
+static void adm8668_ehci_workaround(void)
+{
+ u32 chipid;
+
+ chipid = ADM8668_CONFIG_REG(ADM8668_CR0);
+ ADM8668_CONFIG_REG(ADM8668_CR66) = 0x0C1600D9;
+
+ if (chipid == 0x86880001)
+ return;
+
+ ADM8668_CONFIG_REG(ADM8668_CR66) &= ~(3 << 20);
+ ADM8668_CONFIG_REG(ADM8668_CR66) |= (1 << 20);
+ pr_info("ADM8668: applied USB workaround\n");
+}
+
+
+int __init adm8668_devs_register(void)
+{
+ int ret;
+
+ ret = amba_device_register(&adm8668_uart0_device, &iomem_resource);
+ if (ret)
+ panic("failed to register AMBA UART");
+
+ adm8668_fetch_mac(0);
+ adm8668_fetch_mac(1);
+ adm8668_ehci_workaround();
+
+ return platform_add_devices(adm8668_devs, ARRAY_SIZE(adm8668_devs));
+}
+arch_initcall(adm8668_devs_register);
--- /dev/null
+/*
+ * Copyright (C) 2010 Scott Nicholas <neutronscott@scottn.us>
+ *
+ * based on work of rb532 prom.c
+ * Copyright (C) 2003, Peter Sadik <peter.sadik@idt.com>
+ * Copyright (C) 2005-2006, P.Christeas <p_christ@hol.gr>
+ * Copyright (C) 2007, Gabor Juhos <juhosg@openwrt.org>
+ * Felix Fietkau <nbd@openwrt.org>
+ * Florian Fainelli <florian@openwrt.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/console.h>
+#include <linux/string.h>
+#include <linux/serial_core.h>
+#include <asm/bootinfo.h>
+#include <adm8668.h>
+#include "u-boot.h"
+
+register volatile struct global_data *gd asm ("k0");
+
+void __init prom_free_prom_memory(void)
+{
+ /* No prom memory to free */
+}
+
+static inline int match_tag(char *arg, const char *tag)
+{
+ return strncmp(arg, tag, strlen(tag)) == 0;
+}
+
+static inline unsigned long tag2ul(char *arg, const char *tag)
+{
+ char *num;
+
+ num = arg + strlen(tag);
+ return simple_strtoul(num, 0, 10);
+}
+
+void __init prom_setup_cmdline(void)
+{
+ char *cp;
+ int prom_argc;
+ char **prom_argv;
+ int i;
+
+ prom_argc = fw_arg0;
+ prom_argv = (char **)KSEG0ADDR(fw_arg1);
+
+ cp = &(arcs_cmdline[0]);
+ for (i = 1; i < prom_argc; i++) {
+ prom_argv[i] = (char *)KSEG0ADDR(prom_argv[i]);
+
+ /* default bootargs has "console=/dev/ttyS0" yet console won't
+ * show up at all if you include the '/dev/' nowadays ... */
+ if (match_tag(prom_argv[i], "console=/dev/")) {
+ char *ptr = prom_argv[i] + strlen("console=/dev/");
+
+ strcpy(cp, "console=");
+ cp += strlen("console=");
+ strcpy(cp, ptr);
+ cp += strlen(ptr);
+ *cp++ = ' ';
+ continue;
+ }
+ strcpy(cp, prom_argv[i]);
+ cp += strlen(prom_argv[i]);
+ *cp++ = ' ';
+ }
+ if (prom_argc > 1)
+ --cp; /* trailing space */
+
+ *cp = '\0';
+}
+
+void __init prom_init(void)
+{
+ bd_t *bd = gd->bd;
+ int memsize;
+
+ memsize = bd->bi_memsize;
+ printk("Board info:\n");
+ printk(" RAM size: %d MB\n", (int)memsize/(1024*1024));
+ printk(" NOR start: %#lx\n", bd->bi_flashstart);
+ printk(" NOR size: %#lx\n", bd->bi_flashsize);
+
+ prom_setup_cmdline();
+ add_memory_region(0, memsize, BOOT_MEM_RAM);
+}
--- /dev/null
+#include <linux/init.h>
+#include <linux/reboot.h>
+
+#include <asm/reboot.h>
+#include <adm8668.h>
+
+static void adm8668_restart(char *cmd)
+{
+ int i;
+
+ /* the real deal */
+ for (i = 0; i < 1000; i++)
+ ;
+ ADM8668_CONFIG_REG(ADM8668_CR1) = 1;
+}
+
+void __init plat_mem_setup(void)
+{
+ _machine_restart = adm8668_restart;
+}
+
+const char *get_system_type(void)
+{
+ unsigned long chipid = ADM8668_CONFIG_REG(ADM8668_CR0);
+ int product, revision;
+ static char ret[32];
+
+ product = chipid >> 16;
+ revision = chipid & 0xffff;
+
+ /* i getting fancy :\ */
+ snprintf(ret, sizeof(ret), "ADM%xr%x", product, revision);
+
+ return ret;
+}
+
--- /dev/null
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/clk.h>
+
+#include <asm/time.h>
+#include <adm8668.h>
+
+void __init plat_time_init(void)
+{
+ struct clk *sys_clk;
+
+ adm8668_init_clocks();
+
+ sys_clk = clk_get(NULL, "sys");
+ if (IS_ERR(sys_clk))
+ panic("unable to get system clock\n");
+
+ mips_hpt_frequency = clk_get_rate(sys_clk) / 2;
+}
+
--- /dev/null
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _U_BOOT_H_
+#define _U_BOOT_H_ 1
+
+typedef struct bd_info {
+ int bi_baudrate; /* serial console baudrate */
+ unsigned long bi_ip_addr; /* IP Address */
+ unsigned char bi_enetaddr[6]; /* Ethernet adress */
+ unsigned long bi_arch_number; /* unique id for this board */
+ unsigned long bi_boot_params; /* where this board expects params */
+ unsigned long bi_memstart; /* start of DRAM memory */
+ unsigned long bi_memsize; /* size of DRAM memory in bytes */
+ unsigned long bi_flashstart; /* start of FLASH memory */
+ unsigned long bi_flashsize; /* size of FLASH memory */
+ unsigned long bi_flashoffset; /* reserved area for startup monitor */
+} bd_t;
+
+struct global_data {
+ bd_t *bd; /* board data... */
+ unsigned long flags;
+ unsigned long baudrate;
+ unsigned long have_console; /* serial_init() was called */
+ unsigned long ram_size; /* RAM size */
+ unsigned long reloc_off; /* Relocation Offset */
+ unsigned long env_addr; /* Address of Environment struct */
+ unsigned long env_valid; /* Checksum of Environment valid? */
+ void **jt; /* jump table */
+};
+
+#endif /* _U_BOOT_H_ */
--- /dev/null
+/************************************************************************
+ *
+ * Copyright (c) 2005
+ * Infineon Technologies AG
+ * St. Martin Strasse 53; 81669 Muenchen; Germany
+ *
+ ************************************************************************/
+
+#ifndef __ADM8668_H__
+#define __ADM8668_H__
+
+/*======================= Physical Memory Map ============================*/
+#define ADM8668_SDRAM_BASE 0
+#define ADM8668_SMEM1_BASE 0x10000000
+#define ADM8668_MPMC_BASE 0x11000000
+#define ADM8668_USB_BASE 0x11200000
+#define ADM8668_CONFIG_BASE 0x11400000
+#define ADM8668_WAN_BASE 0x11600000
+#define ADM8668_WLAN_BASE 0x11800000
+#define ADM8668_LAN_BASE 0x11A00000
+#define ADM8668_INTC_BASE 0x1E000000
+#define ADM8668_TMR_BASE 0x1E200000
+#define ADM8668_UART0_BASE 0x1E400000
+#define ADM8668_SMEM0_BASE 0x1FC00000
+#define ADM8668_NAND_BASE 0x1FFFFF00
+
+#define ADM8668_PCICFG_BASE 0x12200000
+#define ADM8668_PCIDAT_BASE 0x12400000
+
+/* interrupt levels */
+#define ADM8668_SWI_IRQ 1
+#define ADM8668_COMMS_RX_IRQ 2
+#define ADM8668_COMMS_TX_IRQ 3
+#define ADM8668_TIMER0_IRQ 4
+#define ADM8668_TIMER1_IRQ 5
+#define ADM8668_UART0_IRQ 6
+#define ADM8668_LAN_IRQ 7
+#define ADM8668_WAN_IRQ 8
+#define ADM8668_WLAN_IRQ 9
+#define ADM8668_GPIO_IRQ 10
+#define ADM8668_IDE_IRQ 11
+#define ADM8668_PCI2_IRQ 12
+#define ADM8668_PCI1_IRQ 13
+#define ADM8668_PCI0_IRQ 14
+#define ADM8668_USB_IRQ 15
+#define ADM8668_IRQ_MAX ADM8668_USB_IRQ
+
+/* register access macros */
+#define ADM8668_CONFIG_REG(_reg) \
+ (*((volatile unsigned int *)(KSEG1ADDR(ADM8668_CONFIG_BASE + (_reg)))))
+
+/* lan registers */
+#define NETCSR6 0x30
+#define NETCSR7 0x38
+#define NETCSR37 0xF8
+
+/* known/used CPU configuration registers */
+#define ADM8668_CR0 0x00
+#define ADM8668_CR1 0x04
+#define ADM8668_CR3 0x0C
+#define ADM8668_CR66 0x108
+
+/** For GPIO control **/
+#define GPIO_REG 0x5C /* on WLAN */
+#define CRGPIO_REG 0x20 /* on CPU */
+
+void adm8668_init_clocks(void);
+
+#endif /* __ADM8668_H__ */
--- /dev/null
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* DO NOT EDIT!! - this file automatically generated
+ * from .s file by awk -f s2h.awk
+ */
+/* Size definitions
+ * Copyright (C) ARM Limited 1998. All rights reserved.
+ */
+
+#ifndef __sizes_h
+#define __sizes_h 1
+
+/* handy sizes */
+#define SZ_16 0x00000010
+#define SZ_256 0x00000100
+#define SZ_512 0x00000200
+
+#define SZ_1K 0x00000400
+#define SZ_4K 0x00001000
+#define SZ_8K 0x00002000
+#define SZ_16K 0x00004000
+#define SZ_64K 0x00010000
+#define SZ_128K 0x00020000
+#define SZ_256K 0x00040000
+#define SZ_512K 0x00080000
+
+#define SZ_1M 0x00100000
+#define SZ_2M 0x00200000
+#define SZ_4M 0x00400000
+#define SZ_8M 0x00800000
+#define SZ_16M 0x01000000
+#define SZ_32M 0x02000000
+#define SZ_64M 0x04000000
+#define SZ_128M 0x08000000
+#define SZ_256M 0x10000000
+#define SZ_512M 0x20000000
+
+#define SZ_1G 0x40000000
+#define SZ_2G 0x80000000
+
+#endif
+
+/* END */
--- /dev/null
+#ifndef __ADM8668_GPIO_H__
+#define __ADM8668_GPIO_H__
+
+#define gpio_to_irq(gpio) -1
+
+#define gpio_get_value __gpio_get_value
+#define gpio_set_value __gpio_set_value
+
+#define gpio_cansleep __gpio_cansleep
+
+#include <asm-generic/gpio.h>
+
+#endif
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_ADM8668_IRQ_H
+#define __ASM_MACH_ADM8668_IRQ_H
+
+#define NR_IRQS 32
+#define MIPS_CPU_IRQ_BASE 16
+
+#endif /* __ASM_MACH_ADM8668_IRQ_H */
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_ADM8668_WAR_H
+#define __ASM_MIPS_MACH_ADM8668_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR 0
+#define R4600_V1_HIT_CACHEOP_WAR 0
+#define R4600_V2_HIT_CACHEOP_WAR 0
+#define R5432_CP0_INTERRUPT_WAR 0
+#define BCM1250_M3_WAR 0
+#define SIBYTE_1956_WAR 0
+#define MIPS4K_ICACHE_REFILL_WAR 0
+#define MIPS_CACHE_SYNC_WAR 0
+#define TX49XX_ICACHE_INDEX_INV_WAR 0
+#define RM9000_CDEX_SMP_WAR 0
+#define ICACHE_REFILLS_WORKAROUND_WAR 0
+#define R10000_LLSC_WAR 0
+#define MIPS34K_MISSED_ITLB_WAR 0
+
+#endif /* __ASM_MIPS_MACH_ADM8668_WAR_H */
--- /dev/null
+/*
+ * Copyright (C) 2010 Scott Nicholas <neutronscott@scottn.us>
+ * Copyright (C) 2012 Florian Fainelli <florian@openwrt.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Note that this controller is identical to the ADM5120 one
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/types.h>
+#include <linux/spinlock.h>
+
+#include <asm/byteorder.h>
+#include <asm/pci.h>
+#include <adm8668.h>
+
+static DEFINE_SPINLOCK(pci_lock);
+
+#define PCI_ENABLE 0x80000000
+#define ADMPCI_IO_BASE 0x12600000
+#define ADMPCI_IO_SIZE 0x1fffff
+#define ADMPCI_MEM_BASE 0x16000000
+#define ADMPCI_MEM_SIZE 0x7ffffff
+
+static inline void write_cfgaddr(u32 addr)
+{
+ __raw_writel((addr | PCI_ENABLE),
+ (void __iomem *)KSEG1ADDR(ADM8668_PCICFG_BASE));
+}
+
+static inline void write_cfgdata(u32 data)
+{
+ __raw_writel(data, (void __iomem *)KSEG1ADDR(ADM8668_PCIDAT_BASE));
+}
+
+static inline u32 read_cfgdata(void)
+{
+ return __raw_readl((void __iomem *)KSEG1ADDR(ADM8668_PCIDAT_BASE));
+}
+
+static inline u32 mkaddr(struct pci_bus *bus, unsigned int devfn, int where)
+{
+ return ((bus->number & 0xff) << 16) | ((devfn & 0xff) << 8) |
+ (where & 0xfc);
+}
+
+static int pci_read_config(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 *val)
+{
+ unsigned long flags;
+ u32 data;
+
+ spin_lock_irqsave(&pci_lock, flags);
+ write_cfgaddr(mkaddr(bus, devfn, where));
+ data = read_cfgdata();
+
+ switch (size) {
+ case 1:
+ if (where & 1)
+ data >>= 8;
+ if (where & 2)
+ data >>= 16;
+ data &= 0xff;
+ break;
+ case 2:
+ if (where & 2)
+ data >>= 16;
+ data &= 0xffff;
+ break;
+ }
+
+ *val = data;
+
+ spin_unlock_irqrestore(&pci_lock, flags);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int pci_write_config(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
+{
+ unsigned long flags;
+ u32 data;
+ int s;
+
+ spin_lock_irqsave(&pci_lock, flags);
+
+ write_cfgaddr(mkaddr(bus, devfn, where));
+ data = read_cfgdata();
+
+ switch (size) {
+ case 1:
+ s = ((where & 3) << 3);
+ data &= ~(0xff << s);
+ data |= ((val & 0xff) << s);
+ break;
+ case 2:
+ s = ((where & 2) << 4);
+ data &= ~(0xffff << s);
+ data |= ((val & 0xffff) << s);
+ break;
+ case 4:
+ data = val;
+ break;
+ }
+
+ write_cfgdata(data);
+
+ spin_unlock_irqrestore(&pci_lock, flags);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops adm8668_pci_ops = {
+ .read = pci_read_config,
+ .write = pci_write_config
+};
+
+
+struct resource pciioport_resource = {
+ .name = "adm8668_pci",
+ .start = ADMPCI_IO_BASE,
+ .end = ADMPCI_IO_BASE + ADMPCI_IO_SIZE,
+ .flags = IORESOURCE_IO
+};
+
+struct resource pciiomem_resource = {
+ .name = "adm8668_pci",
+ .start = ADMPCI_MEM_BASE,
+ .end = ADMPCI_MEM_BASE + ADMPCI_MEM_SIZE,
+ .flags = IORESOURCE_MEM
+};
+
+struct pci_controller adm8668_pci_controller = {
+ .pci_ops = &adm8668_pci_ops,
+ .io_resource = &pciioport_resource,
+ .mem_resource = &pciiomem_resource,
+};
+
+int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ switch (slot) {
+ case 1:
+ return 14;
+ case 2:
+ return 13;
+ case 3:
+ return 12;
+ default:
+ return dev->irq;
+ }
+}
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
+
+static void adm8668_pci_fixup(struct pci_dev *dev)
+{
+ if (dev->devfn != 0)
+ return;
+
+ pr_info("PCI: fixing up ADM8668 controller\n");
+
+ /* setup COMMAND register */
+ pci_write_config_word(dev, PCI_COMMAND,
+ (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER));
+
+ /* setup CACHE_LINE_SIZE register */
+ pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 4);
+
+ /* setup BARS */
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0);
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
+}
+DECLARE_PCI_FIXUP_HEADER(0x1317, 0x8688, adm8668_pci_fixup);
+
+static int __init adm8668_pci_init(void)
+{
+ void __iomem *io_map_base;
+
+ ioport_resource.start = ADMPCI_IO_BASE;
+ ioport_resource.end = ADMPCI_IO_BASE + ADMPCI_IO_SIZE;
+
+ io_map_base = ioremap(ADMPCI_IO_BASE, ADMPCI_IO_SIZE);
+ if (!io_map_base)
+ printk("io_map_base didn't work.\n");
+
+ adm8668_pci_controller.io_map_base = (unsigned long)io_map_base;
+ register_pci_controller(&adm8668_pci_controller);
+
+ return 0;
+}
+arch_initcall(adm8668_pci_init);
--- /dev/null
+/*
+ * Copyright (C) 2010 Scott Nicholas <neutronscott@scottn.us>
+ * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2005 Waldemar Brodkorb <wbx@openwrt.org>
+ * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
+ *
+ * original functions for finding root filesystem from Mike Baker
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *
+ * Copyright 2004, Broadcom Corporation
+ * All Rights Reserved.
+ *
+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
+ *
+ * Flash mapping for adm8668 boards
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/slab.h>
+#include <linux/mtd/partitions.h>
+#include <linux/crc32.h>
+#include <linux/magic.h>
+#include <asm/io.h>
+
+#define WINDOW_ADDR 0x10000000
+#define WINDOW_SIZE 0x800000
+#define BANKWIDTH 2
+
+/* first a little bit about the headers i need.. */
+
+/* just interested in part of the full struct */
+struct squashfs_super_block {
+ __le32 s_magic;
+ __le32 pad0[9]; /* it's not really padding */
+ __le64 bytes_used;
+};
+
+#define IH_MAGIC 0x56190527 /* Image Magic Number */
+struct uboot_header {
+ uint32_t ih_magic; /* Image Header Magic Number */
+ uint32_t ih_hcrc; /* Image Header CRC Checksum */
+ uint32_t ih_time; /* Image Creation Timestamp */
+ uint32_t ih_size; /* Image Data Size */
+ uint32_t ih_load; /* Data Load Address */
+ uint32_t ih_ep; /* Entry Point Address */
+ uint32_t ih_dcrc; /* Image Data CRC Checksum */
+ uint8_t ih_os; /* Operating System */
+ uint8_t ih_arch; /* CPU architecture */
+ uint8_t ih_type; /* Image Type */
+ uint8_t ih_comp; /* Compression Type */
+ char ih_name[32]; /* image name */
+};
+
+/************************************************/
+
+static struct mtd_info *adm8668_mtd;
+
+struct map_info adm8668_map = {
+ name: "adm8668-nor",
+ size: WINDOW_SIZE,
+ phys: WINDOW_ADDR,
+ bankwidth: BANKWIDTH,
+};
+
+/*
+ * Copied from mtdblock.c
+ *
+ * Cache stuff...
+ *
+ * Since typical flash erasable sectors are much larger than what Linux's
+ * buffer cache can handle, we must implement read-modify-write on flash
+ * sectors for each block write requests. To avoid over-erasing flash sectors
+ * and to speed things up, we locally cache a whole flash sector while it is
+ * being written to until a different sector is required.
+ */
+
+static void erase_callback(struct erase_info *done)
+{
+ wait_queue_head_t *wait_q = (wait_queue_head_t *)done->priv;
+ wake_up(wait_q);
+}
+
+static int erase_write (struct mtd_info *mtd, unsigned long pos,
+ int len, const char *buf)
+{
+ struct erase_info erase;
+ DECLARE_WAITQUEUE(wait, current);
+ wait_queue_head_t wait_q;
+ size_t retlen;
+ int ret;
+
+ /*
+ * First, let's erase the flash block.
+ */
+
+ init_waitqueue_head(&wait_q);
+ erase.mtd = mtd;
+ erase.callback = erase_callback;
+ erase.addr = pos;
+ erase.len = len;
+ erase.priv = (u_long)&wait_q;
+
+ set_current_state(TASK_INTERRUPTIBLE);
+ add_wait_queue(&wait_q, &wait);
+
+ ret = mtd->_erase(mtd, &erase);
+ if (ret) {
+ set_current_state(TASK_RUNNING);
+ remove_wait_queue(&wait_q, &wait);
+ printk (KERN_WARNING "erase of region [0x%lx, 0x%x] "
+ "on \"%s\" failed\n",
+ pos, len, mtd->name);
+ return ret;
+ }
+
+ schedule(); /* Wait for erase to finish. */
+ remove_wait_queue(&wait_q, &wait);
+
+ /*
+ * Next, write data to flash.
+ */
+
+ ret = mtd->_write (mtd, pos, len, &retlen, buf);
+ if (ret)
+ return ret;
+ if (retlen != len)
+ return -EIO;
+ return 0;
+}
+
+/* decent defaults in case... shrug */
+static struct mtd_partition adm8668_parts[] = {
+ { name: "linux", offset: 0x40000, size: WINDOW_SIZE-0x40000, },
+ { name: "rootfs", offset: 0xe0000, size: 0x140000, },
+ { name: "uboot_env", offset: 0x20000, size: 0x20000, },
+ { name: NULL, },
+};
+
+/* in case i wanna change stuff later, and to clarify the math section... */
+#define PART_LINUX 0
+#define PART_ROOTFS 1
+#define NR_PARTS 3
+
+static int __init
+init_mtd_partitions(struct mtd_info *mtd, size_t size)
+{
+ struct uboot_header uhdr;
+ int off, blocksize;
+ size_t len, linux_len;
+ struct squashfs_super_block shdr;
+
+ blocksize = mtd->erasesize;
+ if (blocksize < 0x10000)
+ blocksize = 0x10000;
+
+ /* now find squashfs */
+ memset(&shdr, 0xe5, sizeof(shdr));
+ for (off = adm8668_parts[PART_LINUX].offset; off < size; off += blocksize) {
+ /*
+ * Read into buffer
+ */
+ if (mtd->_read(mtd, off, sizeof(shdr), &len, (char *)&shdr) ||
+ len != sizeof(shdr))
+ continue;
+
+ if (shdr.s_magic == SQUASHFS_MAGIC) {
+ uint32_t fs_size = (uint32_t)shdr.bytes_used;
+
+ printk(KERN_INFO "%s: Filesystem type: squashfs, size=%dkB\n",
+ mtd->name, fs_size>>10);
+
+ /* Update rootfs based on the superblock info, and
+ * stretch to end of MTD. rootfs_split will split it */
+ adm8668_parts[PART_ROOTFS].offset = off;
+ adm8668_parts[PART_ROOTFS].size = mtd->size -
+ adm8668_parts[PART_ROOTFS].offset;
+
+ /* kernel ends where rootfs starts
+ * but we'll keep it full-length for upgrades */
+ linux_len = adm8668_parts[PART_LINUX+1].offset -
+ adm8668_parts[PART_LINUX].offset;
+#if 1
+ adm8668_parts[PART_LINUX].size = mtd->size -
+ adm8668_parts[PART_LINUX].offset;
+#else
+ adm8668_parts[PART_LINUX].size = linux_len;
+#endif
+ goto found;
+ }
+ }
+
+ printk(KERN_NOTICE
+ "%s: Couldn't find root filesystem\n",
+ mtd->name);
+ return NR_PARTS;
+
+ found:
+ if (mtd->_read(mtd, adm8668_parts[PART_LINUX].offset, sizeof(uhdr), &len, (char *)&uhdr) ||
+ len != sizeof(uhdr))
+ return NR_PARTS;
+
+ /* that's odd. how'd ya boot it then */
+ if (uhdr.ih_magic != IH_MAGIC)
+ return NR_PARTS;
+
+ if (be32_to_cpu(uhdr.ih_size) != (linux_len - sizeof(uhdr))) {
+ unsigned char *block, *data;
+ unsigned int offset;
+
+ offset = adm8668_parts[PART_LINUX].offset +
+ sizeof(struct uboot_header);
+ data = (unsigned char *)(WINDOW_ADDR | 0xA0000000 | offset);
+
+ printk(KERN_NOTICE "Updating U-boot image:\n");
+ printk(KERN_NOTICE " old: [size: %8d crc32: 0x%08x]\n",
+ be32_to_cpu(uhdr.ih_size), be32_to_cpu(uhdr.ih_dcrc));
+
+ /* Update the data length & crc32 */
+ uhdr.ih_size = cpu_to_be32(linux_len - sizeof(uhdr));
+ uhdr.ih_dcrc = crc32_le(~0, data, linux_len - sizeof(uhdr)) ^ (~0);
+ uhdr.ih_dcrc = cpu_to_be32(uhdr.ih_dcrc);
+
+ printk(KERN_NOTICE " new: [size: %8d crc32: 0x%08x]\n",
+ be32_to_cpu(uhdr.ih_size), be32_to_cpu(uhdr.ih_dcrc));
+
+ /* update header's crc... */
+ uhdr.ih_hcrc = 0;
+ uhdr.ih_hcrc = crc32_le(~0, (unsigned char *)&uhdr,
+ sizeof(uhdr)) ^ (~0);
+ uhdr.ih_hcrc = cpu_to_be32(uhdr.ih_hcrc);
+
+ /* read first eraseblock from the image */
+ block = kmalloc(mtd->erasesize, GFP_KERNEL);
+ if (mtd->_read(mtd, adm8668_parts[PART_LINUX].offset, mtd->erasesize, &len, block) || len != mtd->erasesize) {
+ printk("Error copying first eraseblock\n");
+ return 0;
+ }
+
+ /* Write updated header to the flash */
+ memcpy(block, &uhdr, sizeof(uhdr));
+ if (mtd->_unlock)
+ mtd->_unlock(mtd, off, mtd->erasesize);
+ erase_write(mtd, adm8668_parts[PART_LINUX].offset, mtd->erasesize, block);
+ if (mtd->_sync)
+ mtd->_sync(mtd);
+ kfree(block);
+ printk(KERN_NOTICE "Done\n");
+ }
+
+ return NR_PARTS;
+}
+
+int __init init_adm8668_map(void)
+{
+ int nr_parts, ret;
+
+ adm8668_map.virt = ioremap(WINDOW_ADDR, WINDOW_SIZE);
+
+ if (!adm8668_map.virt) {
+ printk(KERN_ERR "Failed to ioremap\n");
+ return -EIO;
+ }
+
+ simple_map_init(&adm8668_map);
+ if (!(adm8668_mtd = do_map_probe("cfi_probe", &adm8668_map))) {
+ printk(KERN_ERR "cfi_probe failed\n");
+ iounmap((void *)adm8668_map.virt);
+ return -ENXIO;
+ }
+
+ adm8668_mtd->owner = THIS_MODULE;
+
+ nr_parts = init_mtd_partitions(adm8668_mtd, adm8668_mtd->size);
+ ret = mtd_device_register(adm8668_mtd, adm8668_parts, nr_parts);
+ if (ret) {
+ printk(KERN_ERR "Flash: mtd_device_register failed\n");
+ goto fail;
+ }
+
+ return 0;
+
+ fail:
+ if (adm8668_mtd)
+ map_destroy(adm8668_mtd);
+ if (adm8668_map.virt)
+ iounmap((void *) adm8668_map.virt);
+ adm8668_map.virt = 0;
+ return ret;
+}
+
+void __exit cleanup_adm8668_map(void)
+{
+ mtd_device_unregister(adm8668_mtd);
+ map_destroy(adm8668_mtd);
+ iounmap((void *) adm8668_map.virt);
+ adm8668_map.virt = 0;
+}
+
+module_init(init_adm8668_map);
+module_exit(cleanup_adm8668_map);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Scott Nicholas <neutronscott@scottn.us>");
+MODULE_DESCRIPTION("MTD map driver for ADM8668 NOR Flash");
--- /dev/null
+--- a/arch/mips/Kbuild.platforms
++++ b/arch/mips/Kbuild.platforms
+@@ -29,6 +29,7 @@ platforms += sibyte
+ platforms += sni
+ platforms += txx9
+ platforms += vr41xx
++platforms += adm8668
+
+ # include the platform specific files
+ include $(patsubst %, $(srctree)/arch/mips/%/Platform, $(platforms))
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -127,6 +127,27 @@ config BCM47XX
+ help
+ Support for BCM47XX based boards
+
++config ADM8668
++ bool "WildPass ADM8668"
++ select SYS_HAS_CPU_MIPS32_R1
++ select BOOT_RAW
++ select NO_EXCEPT_FILL
++ select IRQ_CPU
++ select CEVT_R4K
++ select CSRC_R4K
++ select HW_HAS_PCI
++ select PCI
++ select SYS_SUPPORTS_LITTLE_ENDIAN
++ select SYS_SUPPORTS_32BIT_KERNEL
++ select DMA_NONCOHERENT
++ select SWAP_IO_SPACE
++ select SYS_HAS_EARLY_PRINTK
++ select ARCH_REQUIRE_GPIOLIB
++ select HAVE_CLK
++ help
++ ADM8668 board support by neutronscott
++ Scott Nicholas <neutronscott@scottn.us>
++
+ config BCM63XX
+ bool "Broadcom BCM63XX based boards"
+ select BOOT_RAW
+@@ -795,6 +816,7 @@ config NLM_XLP_BOARD
+
+ endchoice
+
++source "arch/mips/adm8668/Kconfig"
+ source "arch/mips/alchemy/Kconfig"
+ source "arch/mips/ath79/Kconfig"
+ source "arch/mips/bcm47xx/Kconfig"
--- /dev/null
+--- a/arch/mips/pci/Makefile
++++ b/arch/mips/pci/Makefile
+@@ -57,6 +57,7 @@ obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32
+ obj-$(CONFIG_CAVIUM_OCTEON_SOC) += pci-octeon.o pcie-octeon.o
+ obj-$(CONFIG_CPU_XLR) += pci-xlr.o
+ obj-$(CONFIG_CPU_XLP) += pci-xlp.o
++obj-$(CONFIG_ADM8668) += pci-adm8668.o
+
+ ifdef CONFIG_PCI_MSI
+ obj-$(CONFIG_CAVIUM_OCTEON_SOC) += msi-octeon.o
+--- a/include/linux/pci_ids.h
++++ b/include/linux/pci_ids.h
+@@ -1817,6 +1817,9 @@
+
+ #define PCI_VENDOR_ID_CB 0x1307 /* Measurement Computing */
+
++#define PCI_VENDOR_ADMTEK 0x1317
++#define PCI_DEVICE_ID_ADM8668 0x8688
++
+ #define PCI_VENDOR_ID_SIIG 0x131f
+ #define PCI_SUBVENDOR_ID_SIIG 0x131f
+ #define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000
--- /dev/null
+--- a/drivers/mtd/maps/Kconfig
++++ b/drivers/mtd/maps/Kconfig
+@@ -97,6 +97,12 @@ config MSP_FLASH_MAP_LIMIT
+ default "0x02000000"
+ depends on MSP_FLASH_MAP_LIMIT_32M
+
++config MTD_ADM8668_NOR
++ tristate "ADM8668 NOR mapping"
++ depends on ADM8668 && MTD_CFI
++ help
++ mapping driver for ADM8668 NOR
++
+ config MTD_SUN_UFLASH
+ tristate "Sun Microsystems userflash support"
+ depends on SPARC && MTD_CFI && PCI
+--- a/drivers/mtd/maps/Makefile
++++ b/drivers/mtd/maps/Makefile
+@@ -43,3 +43,4 @@ obj-$(CONFIG_MTD_VMU) += vmu-flash.o
+ obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o
+ obj-$(CONFIG_MTD_LATCH_ADDR) += latch-addr-flash.o
+ obj-$(CONFIG_MTD_LANTIQ) += lantiq-flash.o
++obj-$(CONFIG_MTD_ADM8668_NOR) += adm8668.o
--- /dev/null
+--- a/drivers/net/ethernet/dec/tulip/tulip_core.c
++++ b/drivers/net/ethernet/dec/tulip/tulip_core.c
+@@ -206,7 +206,7 @@ struct tulip_chip_table tulip_tbl[] = {
+
+ };
+
+-
++#ifdef CONFIG_TULIP_PCI
+ static DEFINE_PCI_DEVICE_TABLE(tulip_pci_tbl) = {
+ { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
+ { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
+@@ -250,7 +250,7 @@ static DEFINE_PCI_DEVICE_TABLE(tulip_pci
+ { } /* terminate list */
+ };
+ MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
+-
++#endif
+
+ /* A full-duplex map for media types. */
+ const char tulip_media_cap[32] =
+@@ -268,11 +268,14 @@ static void tulip_down(struct net_device
+ static struct net_device_stats *tulip_get_stats(struct net_device *dev);
+ static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
+ static void set_rx_mode(struct net_device *dev);
++#ifdef CONFIG_TULIP_PCI
+ static void tulip_set_wolopts(struct pci_dev *pdev, u32 wolopts);
++#endif
+ #ifdef CONFIG_NET_POLL_CONTROLLER
+ static void poll_tulip(struct net_device *dev);
+ #endif
+
++#ifdef CONFIG_TULIP_PCI
+ static void tulip_set_power_state (struct tulip_private *tp,
+ int sleep, int snooze)
+ {
+@@ -289,7 +292,7 @@ static void tulip_set_power_state (struc
+ }
+
+ }
+-
++#endif
+
+ static void tulip_up(struct net_device *dev)
+ {
+@@ -303,6 +306,7 @@ static void tulip_up(struct net_device *
+ napi_enable(&tp->napi);
+ #endif
+
++#ifdef CONFIG_TULIP_PCI
+ /* Wake the chip from sleep/snooze mode. */
+ tulip_set_power_state (tp, 0, 0);
+
+@@ -310,6 +314,7 @@ static void tulip_up(struct net_device *
+ pci_enable_wake(tp->pdev, PCI_D3hot, 0);
+ pci_enable_wake(tp->pdev, PCI_D3cold, 0);
+ tulip_set_wolopts(tp->pdev, 0);
++#endif
+
+ /* On some chip revs we must set the MII/SYM port before the reset!? */
+ if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
+@@ -317,18 +322,22 @@ static void tulip_up(struct net_device *
+
+ /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
+ iowrite32(0x00000001, ioaddr + CSR0);
++#ifdef CONFIG_TULIP_PCI
+ pci_read_config_dword(tp->pdev, PCI_COMMAND, ®); /* flush write */
++#endif
+ udelay(100);
+
+ /* Deassert reset.
+ Wait the specified 50 PCI cycles after a reset by initializing
+ Tx and Rx queues and the address filter list. */
+ iowrite32(tp->csr0, ioaddr + CSR0);
++#ifdef CONFIG_TULIP_PCI
+ pci_read_config_dword(tp->pdev, PCI_COMMAND, ®); /* flush write */
++#endif
+ udelay(100);
+
+ if (tulip_debug > 1)
+- netdev_dbg(dev, "tulip_up(), irq==%d\n", tp->pdev->irq);
++ netdev_dbg(dev, "tulip_up(), irq==%d\n", tp->irq);
+
+ iowrite32(tp->rx_ring_dma, ioaddr + CSR3);
+ iowrite32(tp->tx_ring_dma, ioaddr + CSR4);
+@@ -362,9 +371,11 @@ static void tulip_up(struct net_device *
+ *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
+ *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
+
++#ifdef CONFIG_TULIP_PCI
+ mapping = pci_map_single(tp->pdev, tp->setup_frame,
+ sizeof(tp->setup_frame),
+ PCI_DMA_TODEVICE);
++#endif
+ tp->tx_buffers[tp->cur_tx].skb = NULL;
+ tp->tx_buffers[tp->cur_tx].mapping = mapping;
+
+@@ -520,7 +531,7 @@ tulip_open(struct net_device *dev)
+
+ tulip_init_ring (dev);
+
+- retval = request_irq(tp->pdev->irq, tulip_interrupt, IRQF_SHARED,
++ retval = request_irq(tp->irq, tulip_interrupt, IRQF_SHARED,
+ dev->name, dev);
+ if (retval)
+ goto free_ring;
+@@ -644,8 +655,10 @@ static void tulip_init_ring(struct net_d
+ tp->rx_buffers[i].skb = skb;
+ if (skb == NULL)
+ break;
++#ifdef CONFIG_TULIP_PCI
+ mapping = pci_map_single(tp->pdev, skb->data,
+ PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
++#endif
+ tp->rx_buffers[i].mapping = mapping;
+ tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
+ tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
+@@ -678,8 +691,10 @@ tulip_start_xmit(struct sk_buff *skb, st
+ entry = tp->cur_tx % TX_RING_SIZE;
+
+ tp->tx_buffers[entry].skb = skb;
++#ifdef CONFIG_TULIP_PCI
+ mapping = pci_map_single(tp->pdev, skb->data,
+ skb->len, PCI_DMA_TODEVICE);
++#endif
+ tp->tx_buffers[entry].mapping = mapping;
+ tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
+
+@@ -730,16 +745,19 @@ static void tulip_clean_tx_ring(struct t
+ if (tp->tx_buffers[entry].skb == NULL) {
+ /* test because dummy frames not mapped */
+ if (tp->tx_buffers[entry].mapping)
++#ifdef CONFIG_TULIP_PCI
+ pci_unmap_single(tp->pdev,
+ tp->tx_buffers[entry].mapping,
+ sizeof(tp->setup_frame),
+ PCI_DMA_TODEVICE);
++#endif
+ continue;
+ }
+-
++#ifdef CONFIG_TULIP_PCI
+ pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
+ tp->tx_buffers[entry].skb->len,
+ PCI_DMA_TODEVICE);
++#endif
+
+ /* Free the original skb. */
+ dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
+@@ -790,7 +808,9 @@ static void tulip_down (struct net_devic
+ dev->if_port = tp->saved_if_port;
+
+ /* Leave the driver in snooze, not sleep, mode. */
++#ifdef CONFIG_TULIP_PCI
+ tulip_set_power_state (tp, 0, 1);
++#endif
+ }
+
+ static void tulip_free_ring (struct net_device *dev)
+@@ -811,8 +831,10 @@ static void tulip_free_ring (struct net_
+ /* An invalid address. */
+ tp->rx_ring[i].buffer1 = cpu_to_le32(0xBADF00D0);
+ if (skb) {
++#ifdef CONFIG_TULIP_PCI
+ pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
+ PCI_DMA_FROMDEVICE);
++#endif
+ dev_kfree_skb (skb);
+ }
+ }
+@@ -821,8 +843,10 @@ static void tulip_free_ring (struct net_
+ struct sk_buff *skb = tp->tx_buffers[i].skb;
+
+ if (skb != NULL) {
++#ifdef CONFIG_TULIP_PCI
+ pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
+ skb->len, PCI_DMA_TODEVICE);
++#endif
+ dev_kfree_skb (skb);
+ }
+ tp->tx_buffers[i].skb = NULL;
+@@ -843,7 +867,7 @@ static int tulip_close (struct net_devic
+ netdev_dbg(dev, "Shutting down ethercard, status was %02x\n",
+ ioread32 (ioaddr + CSR5));
+
+- free_irq (tp->pdev->irq, dev);
++ free_irq (tp->irq, dev);
+
+ tulip_free_ring (dev);
+
+@@ -874,7 +898,9 @@ static void tulip_get_drvinfo(struct net
+ struct tulip_private *np = netdev_priv(dev);
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
++#ifdef CONFIG_TULIP_PCI
+ strlcpy(info->bus_info, pci_name(np->pdev), sizeof(info->bus_info));
++#endif
+ }
+
+
+@@ -887,7 +913,9 @@ static int tulip_ethtool_set_wol(struct
+ return -EOPNOTSUPP;
+
+ tp->wolinfo.wolopts = wolinfo->wolopts;
+- device_set_wakeup_enable(&tp->pdev->dev, tp->wolinfo.wolopts);
++#ifdef CONFIG_TULIP_PCI
++ device_set_wakeup_enable(tp->kdev, tp->wolinfo.wolopts);
++#endif
+ return 0;
+ }
+
+@@ -1165,9 +1193,11 @@ static void set_rx_mode(struct net_devic
+
+ tp->tx_buffers[entry].skb = NULL;
+ tp->tx_buffers[entry].mapping =
++#ifdef CONFIG_TULIP_PCI
+ pci_map_single(tp->pdev, tp->setup_frame,
+ sizeof(tp->setup_frame),
+ PCI_DMA_TODEVICE);
++#endif
+ /* Put the setup frame on the Tx list. */
+ if (entry == TX_RING_SIZE-1)
+ tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
+@@ -1264,19 +1294,22 @@ out:
+ netdev_dbg(dev, "MWI config cacheline=%d, csr0=%08x\n",
+ cache, csr0);
+ }
+-#endif
+
+ /*
+ * Chips that have the MRM/reserved bit quirk and the burst quirk. That
+ * is the DM910X and the on chip ULi devices
+ */
++#endif
+
++#ifdef CONFIG_TULIP_PCI
+ static int tulip_uli_dm_quirk(struct pci_dev *pdev)
+ {
+ if (pdev->vendor == 0x1282 && pdev->device == 0x9102)
+ return 1;
+ return 0;
+ }
++#endif
++
+
+ static const struct net_device_ops tulip_netdev_ops = {
+ .ndo_open = tulip_open,
+@@ -1294,6 +1327,7 @@ static const struct net_device_ops tulip
+ #endif
+ };
+
++#ifdef CONFIG_TULIP_PCI
+ DEFINE_PCI_DEVICE_TABLE(early_486_chipsets) = {
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },
+ { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },
+@@ -1471,6 +1505,8 @@ static int tulip_init_one(struct pci_dev
+ }
+ }
+ tp->pdev = pdev;
++ tp->kdev = &pdev->dev;
++ tp->irq = irq;
+ tp->base_addr = ioaddr;
+ tp->revision = pdev->revision;
+ tp->csr0 = csr0;
+@@ -1801,6 +1837,7 @@ err_out_free_netdev:
+ }
+
+
++#ifdef CONFIG_TULIP_PCI
+ /* set the registers according to the given wolopts */
+ static void tulip_set_wolopts (struct pci_dev *pdev, u32 wolopts)
+ {
+@@ -1829,6 +1866,7 @@ static void tulip_set_wolopts (struct pc
+ iowrite32(tmp, ioaddr + CSR13);
+ }
+ }
++#endif
+
+ #ifdef CONFIG_PM
+
+@@ -1943,6 +1981,7 @@ static void tulip_remove_one(struct pci_
+
+ /* pci_power_off (pdev, -1); */
+ }
++#endif /* CONFIG_TULIP_PCI */
+
+ #ifdef CONFIG_NET_POLL_CONTROLLER
+ /*
+@@ -1964,7 +2003,8 @@ static void poll_tulip (struct net_devic
+ }
+ #endif
+
+-static struct pci_driver tulip_driver = {
++#ifdef CONFIG_TULIP_PCI
++static struct pci_driver tulip_pci_driver = {
+ .name = DRV_NAME,
+ .id_table = tulip_pci_tbl,
+ .probe = tulip_init_one,
+@@ -1974,10 +2014,12 @@ static struct pci_driver tulip_driver =
+ .resume = tulip_resume,
+ #endif /* CONFIG_PM */
+ };
++#endif
+
+
+ static int __init tulip_init (void)
+ {
++ int ret = 0;
+ #ifdef MODULE
+ pr_info("%s", version);
+ #endif
+@@ -1987,13 +2029,18 @@ static int __init tulip_init (void)
+ tulip_max_interrupt_work = max_interrupt_work;
+
+ /* probe for and init boards */
+- return pci_register_driver(&tulip_driver);
++#ifdef CONFIG_TULIP_PCI
++ ret = pci_register_driver(&tulip_pci_driver);
++#endif
++ return ret;
+ }
+
+
+ static void __exit tulip_cleanup (void)
+ {
+- pci_unregister_driver (&tulip_driver);
++#ifdef CONFIG_TULIP_PCI
++ pci_unregister_driver (&tulip_pci_driver);
++#endif
+ }
+
+
+--- a/drivers/net/ethernet/dec/tulip/interrupt.c
++++ b/drivers/net/ethernet/dec/tulip/interrupt.c
+@@ -73,10 +73,11 @@ int tulip_refill_rx(struct net_device *d
+ netdev_alloc_skb(dev, PKT_BUF_SZ);
+ if (skb == NULL)
+ break;
+-
++#ifdef CONFIG_TULIP_PCI
+ mapping = pci_map_single(tp->pdev, skb->data, PKT_BUF_SZ,
+ PCI_DMA_FROMDEVICE);
+- if (dma_mapping_error(&tp->pdev->dev, mapping)) {
++#endif
++ if (dma_mapping_error(tp->kdev, mapping)) {
+ dev_kfree_skb(skb);
+ tp->rx_buffers[entry].skb = NULL;
+ break;
+@@ -210,9 +211,11 @@ int tulip_poll(struct napi_struct *napi,
+ if (pkt_len < tulip_rx_copybreak &&
+ (skb = netdev_alloc_skb(dev, pkt_len + 2)) != NULL) {
+ skb_reserve(skb, 2); /* 16 byte align the IP header */
++#ifdef CONFIG_TULIP_PCI
+ pci_dma_sync_single_for_cpu(tp->pdev,
+ tp->rx_buffers[entry].mapping,
+ pkt_len, PCI_DMA_FROMDEVICE);
++#endif
+ #if ! defined(__alpha__)
+ skb_copy_to_linear_data(skb, tp->rx_buffers[entry].skb->data,
+ pkt_len);
+@@ -222,9 +225,11 @@ int tulip_poll(struct napi_struct *napi,
+ tp->rx_buffers[entry].skb->data,
+ pkt_len);
+ #endif
++#ifdef CONFIG_TULIP_PCI
+ pci_dma_sync_single_for_device(tp->pdev,
+ tp->rx_buffers[entry].mapping,
+ pkt_len, PCI_DMA_FROMDEVICE);
++#endif
+ } else { /* Pass up the skb already on the Rx ring. */
+ char *temp = skb_put(skb = tp->rx_buffers[entry].skb,
+ pkt_len);
+@@ -239,9 +244,10 @@ int tulip_poll(struct napi_struct *napi,
+ skb->head, temp);
+ }
+ #endif
+-
++#ifdef CONFIG_TULIP_PCI
+ pci_unmap_single(tp->pdev, tp->rx_buffers[entry].mapping,
+ PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
++#endif
+
+ tp->rx_buffers[entry].skb = NULL;
+ tp->rx_buffers[entry].mapping = 0;
+@@ -597,10 +603,12 @@ irqreturn_t tulip_interrupt(int irq, voi
+ if (tp->tx_buffers[entry].skb == NULL) {
+ /* test because dummy frames not mapped */
+ if (tp->tx_buffers[entry].mapping)
++#ifdef CONFIG_TULIP_PCI
+ pci_unmap_single(tp->pdev,
+ tp->tx_buffers[entry].mapping,
+ sizeof(tp->setup_frame),
+ PCI_DMA_TODEVICE);
++#endif
+ continue;
+ }
+
+@@ -628,10 +636,11 @@ irqreturn_t tulip_interrupt(int irq, voi
+ dev->stats.collisions += (status >> 3) & 15;
+ dev->stats.tx_packets++;
+ }
+-
++#ifdef CONFIG_TULIP_PCI
+ pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
+ tp->tx_buffers[entry].skb->len,
+ PCI_DMA_TODEVICE);
++#endif
+
+ /* Free the original skb. */
+ dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
+--- a/drivers/net/ethernet/dec/tulip/Kconfig
++++ b/drivers/net/ethernet/dec/tulip/Kconfig
+@@ -40,8 +40,12 @@ config DE2104X_DSL
+ Default is 0, and range is 0 to 31.
+
+ config TULIP
++ tristate
++
++config TULIP_PCI
+ tristate "DECchip Tulip (dc2114x) PCI support"
+ depends on PCI
++ select TULIP
+ select CRC32
+ ---help---
+ This driver is developed for the SMC EtherPower series Ethernet
+@@ -58,7 +62,7 @@ config TULIP
+
+ config TULIP_MWI
+ bool "New bus configuration"
+- depends on TULIP
++ depends on TULIP_PCI
+ ---help---
+ This configures your Tulip card specifically for the card and
+ system cache line size type you are using.
+@@ -69,7 +73,7 @@ config TULIP_MWI
+
+ config TULIP_MMIO
+ bool "Use PCI shared mem for NIC registers"
+- depends on TULIP
++ depends on TULIP_PCI
+ ---help---
+ Use PCI shared memory for the NIC registers, rather than going through
+ the Tulip's PIO (programmed I/O ports). Faster, but could produce
+--- a/drivers/net/ethernet/dec/tulip/tulip.h
++++ b/drivers/net/ethernet/dec/tulip/tulip.h
+@@ -447,6 +447,8 @@ struct tulip_private {
+ int cur_index; /* Current media index. */
+ int saved_if_port;
+ struct pci_dev *pdev;
++ struct device *kdev;
++ int irq;
+ int ttimer;
+ int susp_rx;
+ unsigned long nir;
--- /dev/null
+--- a/drivers/net/ethernet/dec/tulip/Kconfig
++++ b/drivers/net/ethernet/dec/tulip/Kconfig
+@@ -60,6 +60,14 @@ config TULIP_PCI
+ To compile this driver as a module, choose M here. The module will
+ be called tulip.
+
++config TULIP_PLATFORM
++ tristate "DECchip Tulip (dc2114x) Platform support"
++ depends on HAS_IOMEM
++ select TULIP
++ select CRC32
++ ---help---
++ This driver is for the platform variant.
++
+ config TULIP_MWI
+ bool "New bus configuration"
+ depends on TULIP_PCI
+--- a/drivers/net/ethernet/dec/tulip/tulip_core.c
++++ b/drivers/net/ethernet/dec/tulip/tulip_core.c
+@@ -27,6 +27,8 @@
+ #include <linux/init.h>
+ #include <linux/interrupt.h>
+ #include <linux/etherdevice.h>
++#include <linux/platform_device.h>
++#include <linux/platform_data/tulip.h>
+ #include <linux/delay.h>
+ #include <linux/mii.h>
+ #include <linux/crc32.h>
+@@ -204,6 +206,9 @@ struct tulip_chip_table tulip_tbl[] = {
+ { "Conexant LANfinity", 256, 0x0001ebef,
+ HAS_MII | HAS_ACPI, tulip_timer, tulip_media_task },
+
++ { "Infineon ADM8668", 256, 0x0001a451,
++ MC_HASH_ONLY | COMET_MAC_ADDR, tulip_timer, tulip_media_task, },
++
+ };
+
+ #ifdef CONFIG_TULIP_PCI
+@@ -395,6 +400,7 @@ static void tulip_up(struct net_device *
+ i = 0;
+ if (tp->mtable == NULL)
+ goto media_picked;
++
+ if (dev->if_port) {
+ int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
+ (dev->if_port == 12 ? 0 : dev->if_port);
+@@ -488,6 +494,10 @@ media_picked:
+ iowrite32(ioread32(ioaddr + 0x88) | 1, ioaddr + 0x88);
+ dev->if_port = tp->mii_cnt ? 11 : 0;
+ tp->csr6 = 0x00040000;
++ } else if (tp->chip_id == ADM8668) {
++ /* Enable automatic Tx underrun recovery. */
++ iowrite32(ioread32(ioaddr + 0x88) | 1, ioaddr + 0x88);
++ tp->csr6 = 0x00040000;
+ } else if (tp->chip_id == AX88140) {
+ tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
+ } else
+@@ -659,6 +669,10 @@ static void tulip_init_ring(struct net_d
+ mapping = pci_map_single(tp->pdev, skb->data,
+ PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ mapping = dma_map_single(&tp->pldev->dev, skb->data,
++ PKT_BUF_SZ, DMA_FROM_DEVICE);
++#endif
+ tp->rx_buffers[i].mapping = mapping;
+ tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
+ tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
+@@ -695,6 +709,11 @@ tulip_start_xmit(struct sk_buff *skb, st
+ mapping = pci_map_single(tp->pdev, skb->data,
+ skb->len, PCI_DMA_TODEVICE);
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ mapping = dma_map_single(&tp->pldev->dev, skb->data,
++ skb->len,
++ DMA_TO_DEVICE);
++#endif
+ tp->tx_buffers[entry].mapping = mapping;
+ tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
+
+@@ -758,6 +777,11 @@ static void tulip_clean_tx_ring(struct t
+ tp->tx_buffers[entry].skb->len,
+ PCI_DMA_TODEVICE);
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ dma_unmap_single(&tp->pldev->dev, tp->tx_buffers[entry].mapping,
++ tp->tx_buffers[entry].skb->len,
++ DMA_TO_DEVICE);
++#endif
+
+ /* Free the original skb. */
+ dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
+@@ -835,6 +859,10 @@ static void tulip_free_ring (struct net_
+ pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
+ PCI_DMA_FROMDEVICE);
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ dma_unmap_single(&tp->pldev->dev, mapping, PKT_BUF_SZ,
++ DMA_FROM_DEVICE);
++#endif
+ dev_kfree_skb (skb);
+ }
+ }
+@@ -847,6 +875,10 @@ static void tulip_free_ring (struct net_
+ pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
+ skb->len, PCI_DMA_TODEVICE);
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ dma_unmap_single(&tp->pldev->dev, tp->tx_buffers[i].mapping,
++ skb->len, DMA_TO_DEVICE);
++#endif
+ dev_kfree_skb (skb);
+ }
+ tp->tx_buffers[i].skb = NULL;
+@@ -901,6 +933,9 @@ static void tulip_get_drvinfo(struct net
+ #ifdef CONFIG_TULIP_PCI
+ strlcpy(info->bus_info, pci_name(np->pdev), sizeof(info->bus_info));
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
++#endif
+ }
+
+
+@@ -916,6 +951,9 @@ static int tulip_ethtool_set_wol(struct
+ #ifdef CONFIG_TULIP_PCI
+ device_set_wakeup_enable(tp->kdev, tp->wolinfo.wolopts);
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ device_set_wakeup_enable(&tp->pldev->dev, tp->wolinfo.wolopts);
++#endif
+ return 0;
+ }
+
+@@ -1191,9 +1229,9 @@ static void set_rx_mode(struct net_devic
+
+ }
+
++#ifdef CONFIG_TULIP_PCI
+ tp->tx_buffers[entry].skb = NULL;
+ tp->tx_buffers[entry].mapping =
+-#ifdef CONFIG_TULIP_PCI
+ pci_map_single(tp->pdev, tp->setup_frame,
+ sizeof(tp->setup_frame),
+ PCI_DMA_TODEVICE);
+@@ -1217,6 +1255,9 @@ static void set_rx_mode(struct net_devic
+ spin_unlock_irqrestore(&tp->lock, flags);
+ }
+
++ if (tp->chip_id == ADM8668)
++ csr6 |= (1 << 9); /* force 100Mbps full duplex */
++
+ iowrite32(csr6, ioaddr + CSR6);
+ }
+
+@@ -1983,6 +2024,126 @@ static void tulip_remove_one(struct pci_
+ }
+ #endif /* CONFIG_TULIP_PCI */
+
++#ifdef CONFIG_TULIP_PLATFORM
++static int tulip_probe(struct platform_device *pdev)
++{
++ struct tulip_private *tp;
++ struct tulip_platform_data *pdata;
++ struct net_device *dev;
++ struct resource *res;
++ void __iomem *ioaddr;
++ int irq;
++
++ if (pdev->id < 0 || pdev->id >= MAX_UNITS)
++ return -EINVAL;
++
++ if (!(res = platform_get_resource(pdev, IORESOURCE_IRQ, 0)))
++ return -ENODEV;
++ irq = res->start;
++ if (!(res = platform_get_resource(pdev, IORESOURCE_MEM, 0)))
++ return -ENODEV;
++ if (!(ioaddr = ioremap(res->start, res->end - res->start)))
++ return -ENODEV;
++
++ pdata = pdev->dev.platform_data;
++ if (!pdata)
++ return -ENODEV;
++
++ if (!(dev = alloc_etherdev(sizeof (*tp))))
++ return -ENOMEM;
++
++ /* setup net dev */
++ dev->base_addr = (unsigned long)res->start;
++ dev->irq = irq;
++ SET_NETDEV_DEV(dev, &pdev->dev);
++
++ /* tulip private struct */
++ tp = netdev_priv(dev);
++ tp->dev = dev;
++ tp->base_addr = ioaddr;
++ tp->csr0 = 0;
++ tp->pldev = pdev;
++ tp->kdev = &pdev->dev;
++ tp->irq = irq;
++ tp->rx_ring = dma_alloc_coherent(&pdev->dev,
++ sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
++ sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
++ &tp->rx_ring_dma, GFP_KERNEL);
++ if (!tp->rx_ring)
++ return -ENODEV;
++ tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
++ tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
++
++ tp->chip_id = pdata->chip_id;
++ tp->flags = tulip_tbl[tp->chip_id].flags;
++
++ spin_lock_init(&tp->lock);
++ spin_lock_init(&tp->mii_lock);
++
++ init_timer(&tp->timer);
++ tp->timer.data = (unsigned long)dev;
++ tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
++
++ INIT_WORK(&tp->media_work, tulip_tbl[tp->chip_id].media_task);
++
++ /* Stop the chip's Tx and Rx processes. */
++ tulip_stop_rxtx(tp);
++
++ /* Clear the missed-packet counter. */
++ ioread32(ioaddr + CSR8);
++
++ if (!is_valid_ether_addr(pdata->mac)) {
++ dev_info(&pdev->dev, "generating random ethernet MAC\n");
++ random_ether_addr(dev->dev_addr);
++ } else
++ memcpy(dev->dev_addr, pdata->mac, ETH_ALEN);
++
++ /* The Tulip-specific entries in the device structure. */
++ dev->netdev_ops = &tulip_netdev_ops;
++ dev->watchdog_timeo = TX_TIMEOUT;
++ netif_napi_add(dev, &tp->napi, tulip_poll, 16);
++ SET_ETHTOOL_OPS(dev, &ops);
++
++ if (register_netdev(dev))
++ goto err_out_free_ring;
++
++ dev_info(&dev->dev,
++ "tulip_platform (%s) at MMIO %#lx %pM, IRQ %d\n",
++ tulip_tbl[tp->chip_id].chip_name,
++ (unsigned long)dev->base_addr, dev->dev_addr, irq);
++
++ platform_set_drvdata(pdev, dev);
++ return 0;
++
++err_out_free_ring:
++ dma_free_coherent(&pdev->dev,
++ sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
++ sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
++ tp->rx_ring, tp->rx_ring_dma);
++ return -ENODEV;
++}
++
++static int tulip_remove(struct platform_device *pdev)
++{
++ struct net_device *dev = platform_get_drvdata (pdev);
++ struct tulip_private *tp;
++
++ if (!dev)
++ return -ENODEV;
++
++ tp = netdev_priv(dev);
++ unregister_netdev(dev);
++ dma_free_coherent(&pdev->dev,
++ sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
++ sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
++ tp->rx_ring, tp->rx_ring_dma);
++ iounmap(tp->base_addr);
++ free_netdev(dev);
++ platform_set_drvdata(pdev, NULL);
++ return 0;
++}
++#endif
++
+ #ifdef CONFIG_NET_POLL_CONTROLLER
+ /*
+ * Polling 'interrupt' - used by things like netconsole to send skbs
+@@ -2016,6 +2177,17 @@ static struct pci_driver tulip_pci_drive
+ };
+ #endif
+
++#ifdef CONFIG_TULIP_PLATFORM
++static struct platform_driver tulip_platform_driver = {
++ .probe = tulip_probe,
++ .remove = tulip_remove,
++ .driver = {
++ .owner = THIS_MODULE,
++ .name = DRV_NAME,
++ },
++};
++#endif
++
+
+ static int __init tulip_init (void)
+ {
+@@ -2032,6 +2204,9 @@ static int __init tulip_init (void)
+ #ifdef CONFIG_TULIP_PCI
+ ret = pci_register_driver(&tulip_pci_driver);
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ ret = platform_driver_register(&tulip_platform_driver);
++#endif
+ return ret;
+ }
+
+@@ -2041,6 +2216,9 @@ static void __exit tulip_cleanup (void)
+ #ifdef CONFIG_TULIP_PCI
+ pci_unregister_driver (&tulip_pci_driver);
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ platform_driver_unregister (&tulip_platform_driver);
++#endif
+ }
+
+
+--- a/drivers/net/ethernet/dec/tulip/tulip.h
++++ b/drivers/net/ethernet/dec/tulip/tulip.h
+@@ -21,6 +21,8 @@
+ #include <linux/timer.h>
+ #include <linux/delay.h>
+ #include <linux/pci.h>
++#include <linux/platform_device.h>
++#include <linux/platform_data/tulip.h>
+ #include <asm/io.h>
+ #include <asm/irq.h>
+ #include <asm/unaligned.h>
+@@ -69,28 +71,6 @@ enum tbl_flag {
+ };
+
+
+-/* chip types. careful! order is VERY IMPORTANT here, as these
+- * are used throughout the driver as indices into arrays */
+-/* Note 21142 == 21143. */
+-enum chips {
+- DC21040 = 0,
+- DC21041 = 1,
+- DC21140 = 2,
+- DC21142 = 3, DC21143 = 3,
+- LC82C168,
+- MX98713,
+- MX98715,
+- MX98725,
+- AX88140,
+- PNIC2,
+- COMET,
+- COMPEX9881,
+- I21145,
+- DM910X,
+- CONEXANT,
+-};
+-
+-
+ enum MediaIs {
+ MediaIsFD = 1,
+ MediaAlwaysFD = 2,
+@@ -446,7 +426,12 @@ struct tulip_private {
+ struct mediatable *mtable;
+ int cur_index; /* Current media index. */
+ int saved_if_port;
++#ifdef CONFIG_TULIP_PCI
+ struct pci_dev *pdev;
++#endif
++#ifdef CONFIG_TULIP_PLATFORM
++ struct platform_device *pldev;
++#endif
+ struct device *kdev;
+ int irq;
+ int ttimer;
+--- a/drivers/net/ethernet/dec/tulip/interrupt.c
++++ b/drivers/net/ethernet/dec/tulip/interrupt.c
+@@ -77,6 +77,10 @@ int tulip_refill_rx(struct net_device *d
+ mapping = pci_map_single(tp->pdev, skb->data, PKT_BUF_SZ,
+ PCI_DMA_FROMDEVICE);
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ mapping = dma_map_single(&tp->pldev->dev, skb->data, PKT_BUF_SZ,
++ DMA_FROM_DEVICE);
++#endif
+ if (dma_mapping_error(tp->kdev, mapping)) {
+ dev_kfree_skb(skb);
+ tp->rx_buffers[entry].skb = NULL;
+@@ -204,8 +208,7 @@ int tulip_poll(struct napi_struct *napi,
+ dev->stats.rx_fifo_errors++;
+ }
+ } else {
+- struct sk_buff *skb;
+-
++ struct sk_buff *skb;
+ /* Check if the packet is long enough to accept without copying
+ to a minimally-sized skbuff. */
+ if (pkt_len < tulip_rx_copybreak &&
+@@ -248,6 +251,10 @@ int tulip_poll(struct napi_struct *napi,
+ pci_unmap_single(tp->pdev, tp->rx_buffers[entry].mapping,
+ PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ dma_unmap_single(&tp->pldev->dev, tp->rx_buffers[entry].mapping,
++ PKT_BUF_SZ, DMA_FROM_DEVICE);
++#endif
+
+ tp->rx_buffers[entry].skb = NULL;
+ tp->rx_buffers[entry].mapping = 0;
+@@ -641,6 +648,11 @@ irqreturn_t tulip_interrupt(int irq, voi
+ tp->tx_buffers[entry].skb->len,
+ PCI_DMA_TODEVICE);
+ #endif
++#ifdef CONFIG_TULIP_PLATFORM
++ dma_unmap_single(&tp->pldev->dev, tp->tx_buffers[entry].mapping,
++ tp->tx_buffers[entry].skb->len,
++ DMA_TO_DEVICE);
++#endif
+
+ /* Free the original skb. */
+ dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
+--- /dev/null
++++ b/include/linux/platform_data/tulip.h
+@@ -0,0 +1,31 @@
++#ifndef _LINUX_TULIP_PDATA_H
++#define _LINUX_TULIP_PDATA_H
++
++/* chip types. careful! order is VERY IMPORTANT here, as these
++ * are used throughout the driver as indices into arrays */
++/* Note 21142 == 21143. */
++enum chips {
++ DC21040 = 0,
++ DC21041 = 1,
++ DC21140 = 2,
++ DC21142 = 3, DC21143 = 3,
++ LC82C168,
++ MX98713,
++ MX98715,
++ MX98725,
++ AX88140,
++ PNIC2,
++ COMET,
++ COMPEX9881,
++ I21145,
++ DM910X,
++ CONEXANT,
++ ADM8668,
++};
++
++struct tulip_platform_data {
++ u8 mac[6];
++ enum chips chip_id;
++};
++
++#endif
--- /dev/null
+--- a/drivers/tty/serial/amba-pl010.c
++++ b/drivers/tty/serial/amba-pl010.c
+@@ -49,11 +49,10 @@
+
+ #include <asm/io.h>
+
+-#define UART_NR 8
+-
+ #define SERIAL_AMBA_MAJOR 204
+ #define SERIAL_AMBA_MINOR 16
+-#define SERIAL_AMBA_NR UART_NR
++#define SERIAL_AMBA_NR CONFIG_SERIAL_AMBA_PL010_NUMPORTS
++#define SERIAL_AMBA_NAME CONFIG_SERIAL_AMBA_PL010_PORTNAME
+
+ #define AMBA_ISR_PASS_LIMIT 256
+
+@@ -79,9 +78,9 @@ static void pl010_stop_tx(struct uart_po
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
+ unsigned int cr;
+
+- cr = readb(uap->port.membase + UART010_CR);
++ cr = __raw_readl(uap->port.membase + UART010_CR);
+ cr &= ~UART010_CR_TIE;
+- writel(cr, uap->port.membase + UART010_CR);
++ __raw_writel(cr, uap->port.membase + UART010_CR);
+ }
+
+ static void pl010_start_tx(struct uart_port *port)
+@@ -89,9 +88,9 @@ static void pl010_start_tx(struct uart_p
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
+ unsigned int cr;
+
+- cr = readb(uap->port.membase + UART010_CR);
++ cr = __raw_readl(uap->port.membase + UART010_CR);
+ cr |= UART010_CR_TIE;
+- writel(cr, uap->port.membase + UART010_CR);
++ __raw_writel(cr, uap->port.membase + UART010_CR);
+ }
+
+ static void pl010_stop_rx(struct uart_port *port)
+@@ -99,9 +98,9 @@ static void pl010_stop_rx(struct uart_po
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
+ unsigned int cr;
+
+- cr = readb(uap->port.membase + UART010_CR);
++ cr = __raw_readl(uap->port.membase + UART010_CR);
+ cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
+- writel(cr, uap->port.membase + UART010_CR);
++ __raw_writel(cr, uap->port.membase + UART010_CR);
+ }
+
+ static void pl010_enable_ms(struct uart_port *port)
+@@ -109,18 +108,18 @@ static void pl010_enable_ms(struct uart_
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
+ unsigned int cr;
+
+- cr = readb(uap->port.membase + UART010_CR);
++ cr = __raw_readl(uap->port.membase + UART010_CR);
+ cr |= UART010_CR_MSIE;
+- writel(cr, uap->port.membase + UART010_CR);
++ __raw_writel(cr, uap->port.membase + UART010_CR);
+ }
+
+ static void pl010_rx_chars(struct uart_amba_port *uap)
+ {
+ unsigned int status, ch, flag, rsr, max_count = 256;
+
+- status = readb(uap->port.membase + UART01x_FR);
++ status = __raw_readl(uap->port.membase + UART01x_FR);
+ while (UART_RX_DATA(status) && max_count--) {
+- ch = readb(uap->port.membase + UART01x_DR);
++ ch = __raw_readl(uap->port.membase + UART01x_DR);
+ flag = TTY_NORMAL;
+
+ uap->port.icount.rx++;
+@@ -129,9 +128,9 @@ static void pl010_rx_chars(struct uart_a
+ * Note that the error handling code is
+ * out of the main execution path
+ */
+- rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
++ rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
+ if (unlikely(rsr & UART01x_RSR_ANY)) {
+- writel(0, uap->port.membase + UART01x_ECR);
++ __raw_writel(0, uap->port.membase + UART01x_ECR);
+
+ if (rsr & UART01x_RSR_BE) {
+ rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
+@@ -161,7 +160,7 @@ static void pl010_rx_chars(struct uart_a
+ uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
+
+ ignore_char:
+- status = readb(uap->port.membase + UART01x_FR);
++ status = __raw_readl(uap->port.membase + UART01x_FR);
+ }
+ spin_unlock(&uap->port.lock);
+ tty_flip_buffer_push(&uap->port.state->port);
+@@ -174,7 +173,7 @@ static void pl010_tx_chars(struct uart_a
+ int count;
+
+ if (uap->port.x_char) {
+- writel(uap->port.x_char, uap->port.membase + UART01x_DR);
++ __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR);
+ uap->port.icount.tx++;
+ uap->port.x_char = 0;
+ return;
+@@ -186,7 +185,7 @@ static void pl010_tx_chars(struct uart_a
+
+ count = uap->port.fifosize >> 1;
+ do {
+- writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
++ __raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ uap->port.icount.tx++;
+ if (uart_circ_empty(xmit))
+@@ -204,9 +203,9 @@ static void pl010_modem_status(struct ua
+ {
+ unsigned int status, delta;
+
+- writel(0, uap->port.membase + UART010_ICR);
++ __raw_writel(0, uap->port.membase + UART010_ICR);
+
+- status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
++ status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+
+ delta = status ^ uap->old_status;
+ uap->old_status = status;
+@@ -234,7 +233,7 @@ static irqreturn_t pl010_int(int irq, vo
+
+ spin_lock(&uap->port.lock);
+
+- status = readb(uap->port.membase + UART010_IIR);
++ status = __raw_readl(uap->port.membase + UART010_IIR);
+ if (status) {
+ do {
+ if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
+@@ -247,7 +246,7 @@ static irqreturn_t pl010_int(int irq, vo
+ if (pass_counter-- == 0)
+ break;
+
+- status = readb(uap->port.membase + UART010_IIR);
++ status = __raw_readl(uap->port.membase + UART010_IIR);
+ } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
+ UART010_IIR_TIS));
+ handled = 1;
+@@ -261,7 +260,7 @@ static irqreturn_t pl010_int(int irq, vo
+ static unsigned int pl010_tx_empty(struct uart_port *port)
+ {
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
+- unsigned int status = readb(uap->port.membase + UART01x_FR);
++ unsigned int status = __raw_readl(uap->port.membase + UART01x_FR);
+ return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
+ }
+
+@@ -271,7 +270,7 @@ static unsigned int pl010_get_mctrl(stru
+ unsigned int result = 0;
+ unsigned int status;
+
+- status = readb(uap->port.membase + UART01x_FR);
++ status = __raw_readl(uap->port.membase + UART01x_FR);
+ if (status & UART01x_FR_DCD)
+ result |= TIOCM_CAR;
+ if (status & UART01x_FR_DSR)
+@@ -297,12 +296,12 @@ static void pl010_break_ctl(struct uart_
+ unsigned int lcr_h;
+
+ spin_lock_irqsave(&uap->port.lock, flags);
+- lcr_h = readb(uap->port.membase + UART010_LCRH);
++ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
+ if (break_state == -1)
+ lcr_h |= UART01x_LCRH_BRK;
+ else
+ lcr_h &= ~UART01x_LCRH_BRK;
+- writel(lcr_h, uap->port.membase + UART010_LCRH);
++ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
+ spin_unlock_irqrestore(&uap->port.lock, flags);
+ }
+
+@@ -330,12 +329,12 @@ static int pl010_startup(struct uart_por
+ /*
+ * initialise the old status of the modem signals
+ */
+- uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
++ uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+
+ /*
+ * Finally, enable interrupts
+ */
+- writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
++ __raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
+ uap->port.membase + UART010_CR);
+
+ return 0;
+@@ -358,10 +357,10 @@ static void pl010_shutdown(struct uart_p
+ /*
+ * disable all interrupts, disable the port
+ */
+- writel(0, uap->port.membase + UART010_CR);
++ __raw_writel(0, uap->port.membase + UART010_CR);
+
+ /* disable break condition and fifos */
+- writel(readb(uap->port.membase + UART010_LCRH) &
++ __raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) &
+ ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
+ uap->port.membase + UART010_LCRH);
+
+@@ -383,7 +382,7 @@ pl010_set_termios(struct uart_port *port
+ /*
+ * Ask the core to calculate the divisor for us.
+ */
+- baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
++ baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
+ quot = uart_get_divisor(port, baud);
+
+ switch (termios->c_cflag & CSIZE) {
+@@ -446,25 +445,25 @@ pl010_set_termios(struct uart_port *port
+ uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
+
+ /* first, disable everything */
+- old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
++ old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
+
+ if (UART_ENABLE_MS(port, termios->c_cflag))
+ old_cr |= UART010_CR_MSIE;
+
+- writel(0, uap->port.membase + UART010_CR);
++ __raw_writel(0, uap->port.membase + UART010_CR);
+
+ /* Set baud rate */
+ quot -= 1;
+- writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
+- writel(quot & 0xff, uap->port.membase + UART010_LCRL);
++ __raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
++ __raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL);
+
+ /*
+ * ----------v----------v----------v----------v-----
+ * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
+ * ----------^----------^----------^----------^-----
+ */
+- writel(lcr_h, uap->port.membase + UART010_LCRH);
+- writel(old_cr, uap->port.membase + UART010_CR);
++ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
++ __raw_writel(old_cr, uap->port.membase + UART010_CR);
+
+ spin_unlock_irqrestore(&uap->port.lock, flags);
+ }
+@@ -546,7 +545,7 @@ static struct uart_ops amba_pl010_pops =
+ .verify_port = pl010_verify_port,
+ };
+
+-static struct uart_amba_port *amba_ports[UART_NR];
++static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
+
+ #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
+
+@@ -556,10 +555,10 @@ static void pl010_console_putchar(struct
+ unsigned int status;
+
+ do {
+- status = readb(uap->port.membase + UART01x_FR);
++ status = __raw_readl(uap->port.membase + UART01x_FR);
+ barrier();
+ } while (!UART_TX_READY(status));
+- writel(ch, uap->port.membase + UART01x_DR);
++ __raw_writel(ch, uap->port.membase + UART01x_DR);
+ }
+
+ static void
+@@ -573,8 +572,8 @@ pl010_console_write(struct console *co,
+ /*
+ * First save the CR then disable the interrupts
+ */
+- old_cr = readb(uap->port.membase + UART010_CR);
+- writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
++ old_cr = __raw_readl(uap->port.membase + UART010_CR);
++ __raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
+
+ uart_console_write(&uap->port, s, count, pl010_console_putchar);
+
+@@ -583,10 +582,10 @@ pl010_console_write(struct console *co,
+ * and restore the TCR
+ */
+ do {
+- status = readb(uap->port.membase + UART01x_FR);
++ status = __raw_readl(uap->port.membase + UART01x_FR);
+ barrier();
+ } while (status & UART01x_FR_BUSY);
+- writel(old_cr, uap->port.membase + UART010_CR);
++ __raw_writel(old_cr, uap->port.membase + UART010_CR);
+
+ clk_disable(uap->clk);
+ }
+@@ -595,9 +594,9 @@ static void __init
+ pl010_console_get_options(struct uart_amba_port *uap, int *baud,
+ int *parity, int *bits)
+ {
+- if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
++ if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
+ unsigned int lcr_h, quot;
+- lcr_h = readb(uap->port.membase + UART010_LCRH);
++ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
+
+ *parity = 'n';
+ if (lcr_h & UART01x_LCRH_PEN) {
+@@ -612,8 +611,8 @@ pl010_console_get_options(struct uart_am
+ else
+ *bits = 8;
+
+- quot = readb(uap->port.membase + UART010_LCRL) |
+- readb(uap->port.membase + UART010_LCRM) << 8;
++ quot = __raw_readl(uap->port.membase + UART010_LCRL) |
++ __raw_readl(uap->port.membase + UART010_LCRM) << 8;
+ *baud = uap->port.uartclk / (16 * (quot + 1));
+ }
+ }
+@@ -632,7 +631,7 @@ static int __init pl010_console_setup(st
+ * if so, search for the first available port that does have
+ * console support.
+ */
+- if (co->index >= UART_NR)
++ if (co->index >= SERIAL_AMBA_NR)
+ co->index = 0;
+ uap = amba_ports[co->index];
+ if (!uap)
+@@ -654,7 +653,7 @@ static int __init pl010_console_setup(st
+
+ static struct uart_driver amba_reg;
+ static struct console amba_console = {
+- .name = "ttyAM",
++ .name = SERIAL_AMBA_NAME,
+ .write = pl010_console_write,
+ .device = uart_console_device,
+ .setup = pl010_console_setup,
+@@ -670,11 +669,11 @@ static struct console amba_console = {
+
+ static struct uart_driver amba_reg = {
+ .owner = THIS_MODULE,
+- .driver_name = "ttyAM",
+- .dev_name = "ttyAM",
++ .driver_name = SERIAL_AMBA_NAME,
++ .dev_name = SERIAL_AMBA_NAME,
+ .major = SERIAL_AMBA_MAJOR,
+ .minor = SERIAL_AMBA_MINOR,
+- .nr = UART_NR,
++ .nr = SERIAL_AMBA_NR,
+ .cons = AMBA_CONSOLE,
+ };
+
+--- a/drivers/tty/serial/Kconfig
++++ b/drivers/tty/serial/Kconfig
+@@ -18,10 +18,25 @@ config SERIAL_AMBA_PL010
+ help
+ This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
+ an Integrator/AP or Integrator/PP2 platform, or if you have a
+- Cirrus Logic EP93xx CPU, say Y or M here.
++ Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
+
+ If unsure, say N.
+
++config SERIAL_AMBA_PL010_NUMPORTS
++ int "Maximum number of AMBA PL010 serial ports"
++ depends on SERIAL_AMBA_PL010
++ default "8"
++ ---help---
++ Set this to the number of serial ports you want the AMBA PL010 driver
++ to support.
++
++config SERIAL_AMBA_PL010_PORTNAME
++ string "Name of the AMBA PL010 serial ports"
++ depends on SERIAL_AMBA_PL010
++ default "ttyAM"
++ ---help---
++ ::: To be written :::
++
+ config SERIAL_AMBA_PL010_CONSOLE
+ bool "Support for console on AMBA serial port"
+ depends on SERIAL_AMBA_PL010=y
--- /dev/null
+--- a/drivers/amba/bus.c
++++ b/drivers/amba/bus.c
+@@ -20,6 +20,10 @@
+
+ #include <asm/irq.h>
+
++#ifndef NO_IRQ
++#define NO_IRQ (-1)
++#endif
++
+ #define to_amba_driver(d) container_of(d, struct amba_driver, drv)
+
+ static const struct amba_id *
projects / openwrt / staging / xback.git / commitdiff