drm/amdgpu: Set power ungate state when suspend/fini

Unify to set power ungate state at the begin of suspend/fini.
Remove the workaround code for gfx off feature in
amdgpu_device.c.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 04fbc63a83b733e7a86af7c7f1170c10f3382328..13ea4da9f23a283b8a57476254435f9290ca930e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1817,6 +1817,8 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev)
        int i, r;
 
        amdgpu_amdkfd_device_fini(adev);
+
+       amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
        /* need to disable SMC first */
        for (i = 0; i < adev->num_ip_blocks; i++) {
                if (!adev->ip_blocks[i].status.hw)
@@ -1831,8 +1833,7 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev)
                                          adev->ip_blocks[i].version->funcs->name, r);
                                return r;
                        }
-                       amdgpu_gfx_off_ctrl(adev, false);
-                       cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work);
+
                        r = adev->ip_blocks[i].version->funcs->hw_fini((void *)adev);
                        /* XXX handle errors */
                        if (r) {
@@ -1955,6 +1956,8 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
        if (amdgpu_sriov_vf(adev))
                amdgpu_virt_request_full_gpu(adev, false);
 
+       amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
+
        for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
                if (!adev->ip_blocks[i].status.valid)
                        continue;
@@ -2010,10 +2013,6 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)
                DRM_ERROR("set_clockgating_state(ungate) SMC failed %d\n", r);
        }
 
-       /* call smu to disable gfx off feature first when suspend */
-       amdgpu_gfx_off_ctrl(adev, false);
-       cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work);
-
        for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
                if (!adev->ip_blocks[i].status.valid)
                        continue;

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 5cd45210113f645062750e4ef54ffd4e7dc14da7..282dba6cce86b7b9b1f307f20d94e16b95014b24 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5164,10 +5164,6 @@ static int gfx_v8_0_hw_fini(void *handle)
        gfx_v8_0_cp_enable(adev, false);
        gfx_v8_0_rlc_stop(adev);
 
-       amdgpu_device_ip_set_powergating_state(adev,
-                                              AMD_IP_BLOCK_TYPE_GFX,
-                                              AMD_PG_STATE_UNGATE);
-
        return 0;
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 76d979e276a033d470f41fc4790d433a8a4a6d9c..4e1e1a0dd681af034a98fe1074b8541dca5c078e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3242,9 +3242,6 @@ static int gfx_v9_0_hw_fini(void *handle)
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
        int i;
 
-       amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_GFX,
-                                              AMD_PG_STATE_UNGATE);
-
        amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
        amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
 
@@ -3763,6 +3760,10 @@ static int gfx_v9_0_set_powergating_state(void *handle,
 
        switch (adev->asic_type) {
        case CHIP_RAVEN:
+               if (!enable) {
+                       amdgpu_gfx_off_ctrl(adev, false);
+                       cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work);
+               }
                if (adev->pg_flags & AMD_PG_SUPPORT_RLC_SMU_HS) {
                        gfx_v9_0_enable_sck_slow_down_on_power_up(adev, true);
                        gfx_v9_0_enable_sck_slow_down_on_power_down(adev, true);
@@ -3782,12 +3783,16 @@ static int gfx_v9_0_set_powergating_state(void *handle,
                /* update mgcg state */
                gfx_v9_0_update_gfx_mg_power_gating(adev, enable);
 
-               /* set gfx off through smu */
-               amdgpu_gfx_off_ctrl(adev, true);
+               if (enable)
+                       amdgpu_gfx_off_ctrl(adev, true);
                break;
        case CHIP_VEGA12:
-               /* set gfx off through smu */
-               amdgpu_gfx_off_ctrl(adev, true);
+               if (!enable) {
+                       amdgpu_gfx_off_ctrl(adev, false);
+                       cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work);
+               } else {
+                       amdgpu_gfx_off_ctrl(adev, true);
+               }
                break;
        default:
                break;