services/spm_deprecated: update ARM platform specific asserts
authorArd Biesheuvel <ard.biesheuvel@linaro.org>
Sat, 29 Dec 2018 18:43:21 +0000 (19:43 +0100)
committerArd Biesheuvel <ard.biesheuvel@linaro.org>
Tue, 8 Jan 2019 14:24:16 +0000 (15:24 +0100)
Update some asserts that refer to #defines that only occur in
ARM platforms, preventing this code to be used on other platforms.
Instead, use a platform agnostic name, and update all the existing
users.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
include/plat/arm/common/arm_spm_def.h
include/plat/arm/common/plat_arm.h
plat/arm/board/fvp/fvp_common.c
plat/arm/board/fvp/include/platform_def.h
plat/arm/css/sgi/include/sgi_base_platform_def.h
plat/arm/css/sgi/sgi_plat.c
services/std_svc/spm_deprecated/spm_setup.c

index bdcbc96aff31d5eecd7dfab0c7740fb7d839bf36..c17b5652bc4b1cd1f0b48dc0799b901384cf7e1a 100644 (file)
  * requests. Mapped as RW and NS. Placed after the shared memory between EL3 and
  * S-EL0.
  */
-#define ARM_SP_IMAGE_NS_BUF_BASE       (PLAT_SPM_BUF_BASE + PLAT_SPM_BUF_SIZE)
-#define ARM_SP_IMAGE_NS_BUF_SIZE       ULL(0x10000)
+#define PLAT_SP_IMAGE_NS_BUF_BASE      (PLAT_SPM_BUF_BASE + PLAT_SPM_BUF_SIZE)
+#define PLAT_SP_IMAGE_NS_BUF_SIZE      ULL(0x10000)
 #define ARM_SP_IMAGE_NS_BUF_MMAP       MAP_REGION2(                            \
-                                               ARM_SP_IMAGE_NS_BUF_BASE,       \
-                                               ARM_SP_IMAGE_NS_BUF_BASE,       \
-                                               ARM_SP_IMAGE_NS_BUF_SIZE,       \
+                                               PLAT_SP_IMAGE_NS_BUF_BASE,      \
+                                               PLAT_SP_IMAGE_NS_BUF_BASE,      \
+                                               PLAT_SP_IMAGE_NS_BUF_SIZE,      \
                                                MT_RW_DATA | MT_NS | MT_USER,   \
                                                PAGE_SIZE)
 
index 628160824535d458065d864c2c89ea67bfb88ce8..d1c03be688c738a0b9c1a5f04decdec6cf23f8c7 100644 (file)
@@ -46,8 +46,8 @@ typedef struct arm_tzc_regions_info {
                PLAT_ARM_TZC_NS_DEV_ACCESS},                            \
        {ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS,       \
                PLAT_ARM_TZC_NS_DEV_ACCESS},                            \
-       {ARM_SP_IMAGE_NS_BUF_BASE, (ARM_SP_IMAGE_NS_BUF_BASE +          \
-               ARM_SP_IMAGE_NS_BUF_SIZE) - 1, TZC_REGION_S_NONE,       \
+       {PLAT_SP_IMAGE_NS_BUF_BASE, (PLAT_SP_IMAGE_NS_BUF_BASE +        \
+               PLAT_SP_IMAGE_NS_BUF_SIZE) - 1, TZC_REGION_S_NONE,      \
                PLAT_ARM_TZC_NS_DEV_ACCESS}
 
 #else
index 31a61de4e7aee40d63c7cbbd1911b16009a7c2ec..fa5539dd0768e059ec22394ce3068544eb51394e 100644 (file)
@@ -218,12 +218,12 @@ const secure_partition_boot_info_t plat_arm_secure_partition_boot_info = {
        .sp_image_base       = ARM_SP_IMAGE_BASE,
        .sp_stack_base       = PLAT_SP_IMAGE_STACK_BASE,
        .sp_heap_base        = ARM_SP_IMAGE_HEAP_BASE,
-       .sp_ns_comm_buf_base = ARM_SP_IMAGE_NS_BUF_BASE,
+       .sp_ns_comm_buf_base = PLAT_SP_IMAGE_NS_BUF_BASE,
        .sp_shared_buf_base  = PLAT_SPM_BUF_BASE,
        .sp_image_size       = ARM_SP_IMAGE_SIZE,
        .sp_pcpu_stack_size  = PLAT_SP_IMAGE_STACK_PCPU_SIZE,
        .sp_heap_size        = ARM_SP_IMAGE_HEAP_SIZE,
-       .sp_ns_comm_buf_size = ARM_SP_IMAGE_NS_BUF_SIZE,
+       .sp_ns_comm_buf_size = PLAT_SP_IMAGE_NS_BUF_SIZE,
        .sp_shared_buf_size  = PLAT_SPM_BUF_SIZE,
        .num_sp_mem_regions  = ARM_SP_IMAGE_NUM_MEM_REGIONS,
        .num_cpus            = PLATFORM_CORE_COUNT,
index ca4bd53996aac20401bec6d9e4eb1d35a78e0931..31f06a9881b2239a9a7378c10efca8028a3ad043 100644 (file)
 #define PLAT_ARM_PRIVATE_SDEI_EVENTS   ARM_SDEI_PRIVATE_EVENTS
 #define PLAT_ARM_SHARED_SDEI_EVENTS    ARM_SDEI_SHARED_EVENTS
 
-#define PLAT_ARM_SP_IMAGE_STACK_BASE   (ARM_SP_IMAGE_NS_BUF_BASE +     \
-                                        ARM_SP_IMAGE_NS_BUF_SIZE)
+#define PLAT_ARM_SP_IMAGE_STACK_BASE   (PLAT_SP_IMAGE_NS_BUF_BASE +    \
+                                        PLAT_SP_IMAGE_NS_BUF_SIZE)
 
 #define PLAT_SP_PRI                    PLAT_RAS_PRI
 
index ad7ab81d958536f204945fda1f7e8395d888d03e..4afaae1d9ad528f3c7cd28f7a6adaebbe4304cc8 100644 (file)
 /* Allocate 128KB for CPER buffers */
 #define PLAT_SP_BUF_BASE                       ULL(0x20000)
 
-#define PLAT_ARM_SP_IMAGE_STACK_BASE           (ARM_SP_IMAGE_NS_BUF_BASE + \
-                                               ARM_SP_IMAGE_NS_BUF_SIZE + \
+#define PLAT_ARM_SP_IMAGE_STACK_BASE           (PLAT_SP_IMAGE_NS_BUF_BASE + \
+                                               PLAT_SP_IMAGE_NS_BUF_SIZE + \
                                                PLAT_SP_BUF_BASE)
 
 /* Platform specific SMC FID's used for RAS */
        SDEI_EXPLICIT_EVENT(SGI_SDEI_DS_EVENT_1, SDEI_MAPF_CRITICAL),
 #define PLAT_ARM_SHARED_SDEI_EVENTS
 
-#define ARM_SP_CPER_BUF_BASE                   (ARM_SP_IMAGE_NS_BUF_BASE + \
-                                               ARM_SP_IMAGE_NS_BUF_SIZE)
+#define ARM_SP_CPER_BUF_BASE                   (PLAT_SP_IMAGE_NS_BUF_BASE + \
+                                               PLAT_SP_IMAGE_NS_BUF_SIZE)
 #define ARM_SP_CPER_BUF_SIZE                   ULL(0x20000)
 #define ARM_SP_CPER_BUF_MMAP                   MAP_REGION2(            \
                                                ARM_SP_CPER_BUF_BASE,   \
                                                PAGE_SIZE)
 
 #else
-#define PLAT_ARM_SP_IMAGE_STACK_BASE   (ARM_SP_IMAGE_NS_BUF_BASE +     \
-                                        ARM_SP_IMAGE_NS_BUF_SIZE)
+#define PLAT_ARM_SP_IMAGE_STACK_BASE   (PLAT_SP_IMAGE_NS_BUF_BASE +    \
+                                        PLAT_SP_IMAGE_NS_BUF_SIZE)
 #endif /* RAS_EXTENSION */
 
 /* Platform ID address */
index 79f3e5b55d0c11da0d2ca0b0180879bec0577fc1..8357794372fd8fdb088f23088b316360f57ffcf4 100644 (file)
@@ -127,12 +127,12 @@ const secure_partition_boot_info_t plat_arm_secure_partition_boot_info = {
        .sp_image_base       = ARM_SP_IMAGE_BASE,
        .sp_stack_base       = PLAT_SP_IMAGE_STACK_BASE,
        .sp_heap_base        = ARM_SP_IMAGE_HEAP_BASE,
-       .sp_ns_comm_buf_base = ARM_SP_IMAGE_NS_BUF_BASE,
+       .sp_ns_comm_buf_base = PLAT_SP_IMAGE_NS_BUF_BASE,
        .sp_shared_buf_base  = PLAT_SPM_BUF_BASE,
        .sp_image_size       = ARM_SP_IMAGE_SIZE,
        .sp_pcpu_stack_size  = PLAT_SP_IMAGE_STACK_PCPU_SIZE,
        .sp_heap_size        = ARM_SP_IMAGE_HEAP_SIZE,
-       .sp_ns_comm_buf_size = ARM_SP_IMAGE_NS_BUF_SIZE,
+       .sp_ns_comm_buf_size = PLAT_SP_IMAGE_NS_BUF_SIZE,
        .sp_shared_buf_size  = PLAT_SPM_BUF_SIZE,
        .num_sp_mem_regions  = ARM_SP_IMAGE_NUM_MEM_REGIONS,
        .num_cpus            = PLATFORM_CORE_COUNT,
index d458f4a6a21ba27b8b544283f61daa0b37bc43e6..e78a42c72e2ee5d7ff6ab4215d265c19dffdc857 100644 (file)
@@ -84,10 +84,10 @@ void spm_sp_setup(sp_context_t *sp_ctx)
        unsigned int max_granule_mask = max_granule - 1U;
 
        /* Base must be aligned to the max granularity */
-       assert((ARM_SP_IMAGE_NS_BUF_BASE & max_granule_mask) == 0);
+       assert((PLAT_SP_IMAGE_NS_BUF_BASE & max_granule_mask) == 0);
 
        /* Size must be a multiple of the max granularity */
-       assert((ARM_SP_IMAGE_NS_BUF_SIZE & max_granule_mask) == 0);
+       assert((PLAT_SP_IMAGE_NS_BUF_SIZE & max_granule_mask) == 0);
 
 #endif /* ENABLE_ASSERTIONS */