drm/amd/display: reset retimer/redriver below 340Mhz

[Description]
This is for HDMI 6Ghz mode before we load the driver, because VBIOS
not support HDMI (6Ghz mode)

Reset to redriver/retimer setting for the setting for below 340Mhz.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index b37ecc3ede619f4ccd9004e9a75c9aa66999748a..9fbf926d5bf9fe7b135e20f93e0c17c06737a27e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -2713,17 +2713,37 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)
 {
        struct dc  *core_dc = pipe_ctx->stream->ctx->dc;
        struct dc_stream_state *stream = pipe_ctx->stream;
+       struct dc_link *link = stream->sink->link;
 
        core_dc->hwss.blank_stream(pipe_ctx);
 
        if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
                deallocate_mst_payload(pipe_ctx);
 
-       if (dc_is_hdmi_signal(pipe_ctx->stream->signal))
-               dal_ddc_service_write_scdc_data(
-                       stream->link->ddc, 0,
-                       stream->timing.flags.LTE_340MCSC_SCRAMBLE);
+       if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) {
+               struct ext_hdmi_settings settings = {0};
+               enum engine_id eng_id = pipe_ctx->stream_res.stream_enc->id;
 
+               unsigned short masked_chip_caps = link->chip_caps &
+                               EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK;
+               //Need to inform that sink is going to use legacy HDMI mode.
+               dal_ddc_service_write_scdc_data(
+                       link->ddc,
+                       165000,//vbios only handles 165Mhz.
+                       false);
+               if (masked_chip_caps == EXT_DISPLAY_PATH_CAPS__HDMI20_TISN65DP159RSBT) {
+                       /* DP159, Retimer settings */
+                       if (get_ext_hdmi_settings(pipe_ctx, eng_id, &settings))
+                               write_i2c_retimer_setting(pipe_ctx,
+                                               false, false, &settings);
+                       else
+                               write_i2c_default_retimer_setting(pipe_ctx,
+                                               false, false);
+               } else if (masked_chip_caps == EXT_DISPLAY_PATH_CAPS__HDMI20_PI3EQX1204) {
+                       /* PI3EQX1204, Redriver settings */
+                       write_i2c_redriver_setting(pipe_ctx, false);
+               }
+       }
        core_dc->hwss.disable_stream(pipe_ctx, option);
 
        disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal);