pinctrl: armada-37xx: Fix irq mask access in armada_37xx_irq_set_type()

As explained in the following commit a9a1a4833613 ("pinctrl:
armada-37xx: Fix gpio interrupt setup") the armada_37xx_irq_set_type()
function can be called before the initialization of the mask field.

That means that we can't use this field in this function and need to
workaround it using hwirq.

Fixes: 30ac0d3b0702 ("pinctrl: armada-37xx: Add edge both type gpio irq support")
Cc: stable@vger.kernel.org
Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Link: https://lore.kernel.org/r/20191115155752.2562-1-gregory.clement@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 9df4277a16be0396242a8723a2d7fe79092c5cb2..aa9dcde0f0696f80db5a314b47b9bdfdc0e57cf9 100644 (file)
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -595,10 +595,10 @@ static int armada_37xx_irq_set_type(struct irq_data *d, unsigned int type)
                regmap_read(info->regmap, in_reg, &in_val);
 
                /* Set initial polarity based on current input level. */
-               if (in_val & d->mask)
-                       val |= d->mask;         /* falling */
+               if (in_val & BIT(d->hwirq % GPIO_PER_REG))
+                       val |= BIT(d->hwirq % GPIO_PER_REG);    /* falling */
                else
-                       val &= ~d->mask;        /* rising */
+                       val &= ~(BIT(d->hwirq % GPIO_PER_REG)); /* rising */
                break;
        }
        default: