pinctrl-0 = <&state_default>;
state_default: pinmux {
- spi {
- lantiq,groups = "spi", "spi_cs1";
- lantiq,function = "spi";
- };
asc {
lantiq,groups = "asc";
lantiq,function = "asc";
lantiq,open-drain = <1>;
};
};
+ pins_spi_default: pins_spi_default {
+ spi_in {
+ lantiq,groups = "spi_di";
+ lantiq,function = "spi";
+ };
+ spi_out {
+ lantiq,groups = "spi_do", "spi_clk",
+ "spi_cs1";
+ lantiq,function = "spi";
+ lantiq,output = <1>;
+ };
+ };
};
etop@E180000 {
};
spi@E100800 {
- m25p80@0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_spi_default>;
+
+ m25p80@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- reg = <0 0>;
+ reg = <1 0>;
spi-max-frequency = <5000000>;
partition@0 {
lantiq,output = <1>;
lantiq,pull = <0>;
};
- spi {
- lantiq,groups = "spi", "spi_cs4";
+ };
+ pins_spi_default: pins_spi_default {
+ spi_in {
+ lantiq,groups = "spi_di";
lantiq,function = "spi";
};
+ spi_out {
+ lantiq,groups = "spi_do", "spi_clk",
+ "spi_cs4";
+ lantiq,function = "spi";
+ lantiq,output = <1>;
+ };
};
};
};
&spi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_spi_default>;
+
status = "ok";
- m25p80@3 {
+ m25p80@4 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- reg = <3 0>;
+ reg = <4 0>;
spi-max-frequency = <1000000>;
partition@0 {
lantiq,groups = "stp";
lantiq,function = "stp";
};
- spi {
- lantiq,groups = "spi", "spi_cs4";
- lantiq,function = "spi";
- };
nand {
lantiq,groups = "nand cle", "nand ale",
"nand rd", "nand rdy";
lantiq,pull = <2>;
};
};
+ pins_spi_default: pins_spi_default {
+ spi_in {
+ lantiq,groups = "spi_di";
+ lantiq,function = "spi";
+ };
+ spi_out {
+ lantiq,groups = "spi_do", "spi_clk",
+ "spi_cs4";
+ lantiq,function = "spi";
+ lantiq,output = <1>;
+ };
+ };
};
eth@E108000 {
};
&spi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_spi_default>;
+
status = "ok";
- m25p80@3 {
+ m25p80@4 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- reg = <3 0>;
+ reg = <4 0>;
spi-max-frequency = <1000000>;
partition@0 {
pinctrl-0 = <&state_default>;
state_default: pinmux {
- spi {
- lantiq,groups = "spi", "spi_cs4";
- lantiq,function = "spi";
- };
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
lantiq,output = <1>;
};
};
+ pins_spi_default: pins_spi_default {
+ spi_in {
+ lantiq,groups = "spi_di";
+ lantiq,function = "spi";
+ };
+ spi_out {
+ lantiq,groups = "spi_do", "spi_clk",
+ "spi_cs4";
+ lantiq,function = "spi";
+ lantiq,output = <1>;
+ };
+ };
};
eth@E108000 {
};
&spi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_spi_default>;
+
status = "ok";
- m25p80@3 {
+ m25p80@4 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- reg = <3 0>;
+ reg = <4 0>;
spi-max-frequency = <1000000>;
ath9k_cal: partition@0 {
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
- spi {
- lantiq,groups = "spi", "spi_cs4";
- lantiq,function = "spi";
- };
pcie-rst {
lantiq,pins = "io38";
lantiq,pull = <0>;
lantiq,output = <1>;
};
};
+ pins_spi_default: pins_spi_default {
+ spi_in {
+ lantiq,groups = "spi_di";
+ lantiq,function = "spi";
+ };
+ spi_out {
+ lantiq,groups = "spi_do", "spi_clk",
+ "spi_cs4";
+ lantiq,function = "spi";
+ lantiq,output = <1>;
+ };
+ };
};
eth@E108000 {
};
&spi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_spi_default>;
+
status = "ok";
- m25p80@3 {
+ m25p80@4 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- reg = <3 0>;
+ reg = <4 0>;
spi-max-frequency = <33250000>;
m25p,fast-read;
reg = <0x10000000 0xEF00000>;
spi@E100800 {
- compatible = "lantiq,spi-xway";
+ compatible = "lantiq,ase-spi";
reg = <0xE100800 0x100>;
interrupt-parent = <&icu0>;
interrupts = <24 25 26>;
+ interrupt-names = "spi_rx", "spi_tx", "spi_err",
+ "spi_frm";
#address-cells = <1>;
#size-cells = <1>;
};
};
spi: spi@E100800 {
- compatible = "lantiq,spi-xway";
+ compatible = "lantiq,xrx100-spi";
reg = <0xE100800 0x100>;
interrupt-parent = <&icu0>;
interrupts = <22 23 24>;
+ interrupt-names = "spi_rx", "spi_tx", "spi_err",
+ "spi_frm";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
};
spi: spi@E100800 {
- compatible = "lantiq,spi-xway";
+ compatible = "lantiq,xrx200-spi";
reg = <0xE100800 0x100>;
interrupt-parent = <&icu0>;
interrupts = <22 23 24>;
+ interrupt-names = "spi_rx", "spi_tx", "spi_err",
+ "spi_frm";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
CONFIG_RTL8367B_PHY=y
CONFIG_RTL8367_PHY=y
CONFIG_SPI=y
-CONFIG_SPI_BITBANG=y
+CONFIG_SPI_LANTIQ=y
CONFIG_SPI_MASTER=y
-CONFIG_SPI_XWAY=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_RTL8367B_PHY=y
CONFIG_RTL8367_PHY=y
CONFIG_SPI=y
-CONFIG_SPI_BITBANG=y
+CONFIG_SPI_LANTIQ=y
CONFIG_SPI_MASTER=y
-CONFIG_SPI_XWAY=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y