LINUX_VERSION-4.14 = .187
LINUX_VERSION-4.19 = .131
-LINUX_VERSION-5.4 = .50
+LINUX_VERSION-5.4 = .51
LINUX_KERNEL_HASH-4.14.187 = 5b223475eaeea196aa7e127d3f253bca5c35d8afdc72ca75230ce1ecdd1454bd
LINUX_KERNEL_HASH-4.19.131 = 19dfb9f6cc4ba30104b65dcce7d78240a4ae188cb366747d5f8eae35e98964ba
-LINUX_KERNEL_HASH-5.4.50 = ad10f4c1e900f4e3eb4903b65dbcb4ca74250de63aa9fa7105b9b3c3f9a8a6e2
+LINUX_KERNEL_HASH-5.4.51 = 9e8bea8b4cd636726b7e495a3b467c8ffe96f8eddc159a45fe4a7e6e07a2069d
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))
--- a/fs/locks.c
+++ b/fs/locks.c
-@@ -2989,6 +2989,8 @@ static const struct seq_operations locks
+@@ -2992,6 +2992,8 @@ static const struct seq_operations locks
static int __init proc_locks_init(void)
{
selftest.o \
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c
-@@ -1299,4 +1299,5 @@ static void __exit dma_buf_deinit(void)
+@@ -1295,4 +1295,5 @@ static void __exit dma_buf_deinit(void)
dma_buf_uninit_debugfs();
kern_unmount(dma_buf_mnt);
}
+++ /dev/null
-From db4603e30effd74d4adb6bcdf73072b2c06fafcd Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Fri, 3 Jul 2020 00:07:15 +0200
-Subject: [PATCH] MIPS: Add missing EHB in mtc0 -> mfc0 sequence for DSPen
-
-This resolves the hazard between the mtc0 in the change_c0_status() and
-the mfc0 in configure_exception_vector(). Without resolving this hazard
-configure_exception_vector() could read an old value and would restore
-this old value again. This would revert the changes change_c0_status()
-did. I checked this by printing out the read_c0_status() at the end of
-per_cpu_trap_init() and the ST0_MX is not set without this patch.
-
-The hazard is documented in the MIPS Architecture Reference Manual Vol.
-III: MIPS32/microMIPS32 Privileged Resource Architecture (MD00088), rev
-6.03 table 8.1 which includes:
-
- Producer | Consumer | Hazard
- ----------|----------|----------------------------
- mtc0 | mfc0 | any coprocessor 0 register
-
-I saw this hazard on an Atheros AR9344 rev 2 SoC with a MIPS 74Kc CPU.
-There the change_c0_status() function would activate the DSPen by
-setting ST0_MX in the c0_status register. This was reverted and then the
-system got a DSP exception when the DSP registers were saved in
-save_dsp() in the first process switch. The crash looks like this:
-
-[ 0.089999] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
-[ 0.097796] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
-[ 0.107070] Kernel panic - not syncing: Unexpected DSP exception
-[ 0.113470] Rebooting in 1 seconds..
-
-We saw this problem in OpenWrt only on the MIPS 74Kc based Atheros SoCs,
-not on the 24Kc based SoCs. We only saw it with kernel 5.4 not with
-kernel 4.19, in addition we had to use GCC 8.4 or 9.X, with GCC 8.3 it
-did not happen.
-
-In the kernel I bisected this problem to commit 9012d011660e ("compiler:
-allow all arches to enable CONFIG_OPTIMIZE_INLINING"), but when this was
-reverted it also happened after commit 172dcd935c34b ("MIPS: Always
-allocate exception vector for MIPSr2+").
-
-Commit 0b24cae4d535 ("MIPS: Add missing EHB in mtc0 -> mfc0 sequence.")
-does similar changes to a different file. I am not sure if there are
-more places affected by this problem.
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Cc: <stable@vger.kernel.org>
----
- arch/mips/kernel/traps.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/mips/kernel/traps.c
-+++ b/arch/mips/kernel/traps.c
-@@ -2126,6 +2126,7 @@ static void configure_status(void)
-
- change_c0_status(ST0_CU|ST0_MX|ST0_RE|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
- status_set);
-+ back_to_back_c0_hazard();
- }
-
- unsigned int hwrena;
+ clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH |
PMU_PPE_DP | PMU_PPE_TC);
clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
-- clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY);
-- clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY);
+- clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
+- clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
+ clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY);
+ clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY);
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
PMU_PPE_QSB | PMU_PPE_TOP);
-- clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY);
-- clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY);
+- clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
+- clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
+ clkdev_add_pmu("1f203020.gphy", NULL, 0, 0, PMU_GPHY);
+ clkdev_add_pmu("1f203068.gphy", NULL, 0, 0, PMU_GPHY);
clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);