drm/amd/display: Refactor dcn10_dpp_cm_helper to dcn10_cm_common
authorYue Hin Lau <Yuehin.Lau@amd.com>
Mon, 11 Sep 2017 18:30:02 +0000 (14:30 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Sat, 21 Oct 2017 20:40:33 +0000 (16:40 -0400)
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/Makefile
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c [new file with mode: 0644]
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h [new file with mode: 0644]
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.c [deleted file]
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.h [deleted file]

index 2d6d3a3718588f830b85e1358448415e607d9259..6b19106f46795159f15ab9d599e0bab4c4435aaa 100644 (file)
@@ -4,7 +4,7 @@
 DCN10 = dcn10_resource.o dcn10_ipp.o dcn10_hw_sequencer.o \
                dcn10_dpp.o dcn10_opp.o dcn10_timing_generator.o \
                dcn10_mem_input.o dcn10_mpc.o \
-               dcn10_dpp_dscl.o dcn10_dpp_cm.o dcn10_dpp_cm_helper.o
+               dcn10_dpp_dscl.o dcn10_dpp_cm.o dcn10_cm_common.o
 
 AMD_DAL_DCN10 = $(addprefix $(AMDDALPATH)/dc/dcn10/,$(DCN10))
 
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c
new file mode 100644 (file)
index 0000000..7f579cb
--- /dev/null
@@ -0,0 +1,123 @@
+/*
+ * Copyright 2016 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#include "reg_helper.h"
+#include "dcn10_dpp.h"
+
+#include "dcn10_cm_common.h"
+
+#define REG(reg) reg
+
+#define CTX \
+       ctx
+
+#undef FN
+#define FN(reg_name, field_name) \
+       reg->shifts.field_name, reg->masks.field_name
+
+void cm_helper_program_color_matrices(
+               struct dc_context *ctx,
+               const uint16_t *regval,
+               const struct color_matrices_reg *reg)
+{
+       uint32_t cur_csc_reg;
+       unsigned int i = 0;
+
+       for (cur_csc_reg = reg->csc_c11_c12;
+                       cur_csc_reg <= reg->csc_c33_c34;
+                       cur_csc_reg++) {
+
+               const uint16_t *regval0 = &(regval[2 * i]);
+               const uint16_t *regval1 = &(regval[(2 * i) + 1]);
+
+               REG_SET_2(cur_csc_reg, 0,
+                               csc_c11, *regval0,
+                               csc_c12, *regval1);
+
+               i++;
+       }
+
+}
+
+void cm_helper_program_xfer_func(
+               struct dc_context *ctx,
+               const struct pwl_params *params,
+               const struct xfer_func_reg *reg)
+{
+       uint32_t reg_region_cur;
+       unsigned int i = 0;
+
+       REG_SET_2(reg->start_cntl_b, 0,
+                       exp_region_start, params->arr_points[0].custom_float_x,
+                       exp_resion_start_segment, 0);
+       REG_SET_2(reg->start_cntl_g, 0,
+                       exp_region_start, params->arr_points[0].custom_float_x,
+                       exp_resion_start_segment, 0);
+       REG_SET_2(reg->start_cntl_r, 0,
+                       exp_region_start, params->arr_points[0].custom_float_x,
+                       exp_resion_start_segment, 0);
+
+       REG_SET(reg->start_slope_cntl_b, 0,
+                       field_region_linear_slope, params->arr_points[0].custom_float_slope);
+       REG_SET(reg->start_slope_cntl_g, 0,
+                       field_region_linear_slope, params->arr_points[0].custom_float_slope);
+       REG_SET(reg->start_slope_cntl_r, 0,
+                       field_region_linear_slope, params->arr_points[0].custom_float_slope);
+
+       REG_SET(reg->start_end_cntl1_b, 0,
+                       field_region_end, params->arr_points[1].custom_float_x);
+       REG_SET_2(reg->start_end_cntl2_b, 0,
+                       field_region_end_slope, params->arr_points[1].custom_float_slope,
+                       field_region_end_base, params->arr_points[1].custom_float_y);
+
+       REG_SET(reg->start_end_cntl1_g, 0,
+                       field_region_end, params->arr_points[1].custom_float_x);
+       REG_SET_2(reg->start_end_cntl2_g, 0,
+                       field_region_end_slope, params->arr_points[1].custom_float_slope,
+               field_region_end_base, params->arr_points[1].custom_float_y);
+
+       REG_SET(reg->start_end_cntl1_r, 0,
+                       field_region_end, params->arr_points[1].custom_float_x);
+       REG_SET_2(reg->start_end_cntl2_r, 0,
+                       field_region_end_slope, params->arr_points[1].custom_float_slope,
+               field_region_end_base, params->arr_points[1].custom_float_y);
+
+       for (reg_region_cur = reg->region_start;
+                       reg_region_cur <= reg->region_end;
+                       reg_region_cur++) {
+
+               const struct gamma_curve *curve0 = &(params->arr_curve_points[2 * i]);
+               const struct gamma_curve *curve1 = &(params->arr_curve_points[(2 * i) + 1]);
+
+               REG_SET_4(reg_region_cur, 0,
+                               exp_region0_lut_offset, curve0->offset,
+                               exp_region0_num_segments, curve0->segments_num,
+                               exp_region1_lut_offset, curve1->offset,
+                               exp_region1_num_segments, curve1->segments_num);
+
+               i++;
+       }
+
+}
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h
new file mode 100644 (file)
index 0000000..64836dc
--- /dev/null
@@ -0,0 +1,99 @@
+/*
+ * Copyright 2016 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#ifndef __DAL_DCN10_CM_COMMON_H__
+#define __DAL_DCN10_CM_COMMON_H__
+
+#define TF_HELPER_REG_FIELD_LIST(type) \
+       type exp_region0_lut_offset; \
+       type exp_region0_num_segments; \
+       type exp_region1_lut_offset; \
+       type exp_region1_num_segments;\
+       type field_region_end;\
+       type field_region_end_slope;\
+       type field_region_end_base;\
+       type exp_region_start;\
+       type exp_resion_start_segment;\
+       type field_region_linear_slope
+
+#define TF_CM_REG_FIELD_LIST(type) \
+       type csc_c11; \
+       type csc_c12
+
+struct xfer_func_shift {
+       TF_HELPER_REG_FIELD_LIST(uint8_t);
+};
+
+struct xfer_func_mask {
+       TF_HELPER_REG_FIELD_LIST(uint32_t);
+};
+
+struct xfer_func_reg {
+       struct xfer_func_shift shifts;
+       struct xfer_func_mask masks;
+
+       uint32_t start_cntl_b;
+       uint32_t start_cntl_g;
+       uint32_t start_cntl_r;
+       uint32_t start_slope_cntl_b;
+       uint32_t start_slope_cntl_g;
+       uint32_t start_slope_cntl_r;
+       uint32_t start_end_cntl1_b;
+       uint32_t start_end_cntl2_b;
+       uint32_t start_end_cntl1_g;
+       uint32_t start_end_cntl2_g;
+       uint32_t start_end_cntl1_r;
+       uint32_t start_end_cntl2_r;
+       uint32_t region_start;
+       uint32_t region_end;
+};
+
+struct cm_color_matrix_shift {
+       TF_CM_REG_FIELD_LIST(uint8_t);
+};
+
+struct cm_color_matrix_mask {
+       TF_CM_REG_FIELD_LIST(uint32_t);
+};
+
+struct color_matrices_reg{
+       struct cm_color_matrix_shift shifts;
+       struct cm_color_matrix_mask masks;
+
+       uint32_t csc_c11_c12;
+       uint32_t csc_c33_c34;
+};
+
+void cm_helper_program_color_matrices(
+               struct dc_context *ctx,
+               const uint16_t *regval,
+               const struct color_matrices_reg *reg);
+
+void cm_helper_program_xfer_func(
+               struct dc_context *ctx,
+               const struct pwl_params *params,
+               const struct xfer_func_reg *reg);
+
+#endif
index d0e72acfc1d5cb3356120055327204aca45e81c2..61e2a8919e9ce4754f2a0623aa7f57e2bb1a17d3 100644 (file)
@@ -29,8 +29,8 @@
 
 #include "reg_helper.h"
 #include "dcn10_dpp.h"
-#include "dcn10_dpp_cm_helper.h"
 #include "basics/conversion.h"
+#include "dcn10_cm_common.h"
 
 #define NUM_PHASES    64
 #define HORZ_MAX_TAPS 8
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.c
deleted file mode 100644 (file)
index f616e08..0000000
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * Copyright 2016 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#include "reg_helper.h"
-#include "dcn10_dpp.h"
-
-#include "dcn10_dpp_cm_helper.h"
-
-#define REG(reg) reg
-
-#define CTX \
-       ctx
-
-#undef FN
-#define FN(reg_name, field_name) \
-       reg->shifts.field_name, reg->masks.field_name
-
-void cm_helper_program_color_matrices(
-               struct dc_context *ctx,
-               const uint16_t *regval,
-               const struct color_matrices_reg *reg)
-{
-       uint32_t cur_csc_reg;
-       unsigned int i = 0;
-
-       for (cur_csc_reg = reg->csc_c11_c12;
-                       cur_csc_reg <= reg->csc_c33_c34;
-                       cur_csc_reg++) {
-
-               const uint16_t *regval0 = &(regval[2 * i]);
-               const uint16_t *regval1 = &(regval[(2 * i) + 1]);
-
-               REG_SET_2(cur_csc_reg, 0,
-                               csc_c11, *regval0,
-                               csc_c12, *regval1);
-
-               i++;
-       }
-
-}
-
-void cm_helper_program_xfer_func(
-               struct dc_context *ctx,
-               const struct pwl_params *params,
-               const struct xfer_func_reg *reg)
-{
-       uint32_t reg_region_cur;
-       unsigned int i = 0;
-
-       REG_SET_2(reg->start_cntl_b, 0,
-                       exp_region_start, params->arr_points[0].custom_float_x,
-                       exp_resion_start_segment, 0);
-       REG_SET_2(reg->start_cntl_g, 0,
-                       exp_region_start, params->arr_points[0].custom_float_x,
-                       exp_resion_start_segment, 0);
-       REG_SET_2(reg->start_cntl_r, 0,
-                       exp_region_start, params->arr_points[0].custom_float_x,
-                       exp_resion_start_segment, 0);
-
-       REG_SET(reg->start_slope_cntl_b, 0,
-                       field_region_linear_slope, params->arr_points[0].custom_float_slope);
-       REG_SET(reg->start_slope_cntl_g, 0,
-                       field_region_linear_slope, params->arr_points[0].custom_float_slope);
-       REG_SET(reg->start_slope_cntl_r, 0,
-                       field_region_linear_slope, params->arr_points[0].custom_float_slope);
-
-       REG_SET(reg->start_end_cntl1_b, 0,
-                       field_region_end, params->arr_points[1].custom_float_x);
-       REG_SET_2(reg->start_end_cntl2_b, 0,
-                       field_region_end_slope, params->arr_points[1].custom_float_slope,
-                       field_region_end_base, params->arr_points[1].custom_float_y);
-
-       REG_SET(reg->start_end_cntl1_g, 0,
-                       field_region_end, params->arr_points[1].custom_float_x);
-       REG_SET_2(reg->start_end_cntl2_g, 0,
-                       field_region_end_slope, params->arr_points[1].custom_float_slope,
-               field_region_end_base, params->arr_points[1].custom_float_y);
-
-       REG_SET(reg->start_end_cntl1_r, 0,
-                       field_region_end, params->arr_points[1].custom_float_x);
-       REG_SET_2(reg->start_end_cntl2_r, 0,
-                       field_region_end_slope, params->arr_points[1].custom_float_slope,
-               field_region_end_base, params->arr_points[1].custom_float_y);
-
-       for (reg_region_cur = reg->region_start;
-                       reg_region_cur <= reg->region_end;
-                       reg_region_cur++) {
-
-               const struct gamma_curve *curve0 = &(params->arr_curve_points[2 * i]);
-               const struct gamma_curve *curve1 = &(params->arr_curve_points[(2 * i) + 1]);
-
-               REG_SET_4(reg_region_cur, 0,
-                               exp_region0_lut_offset, curve0->offset,
-                               exp_region0_num_segments, curve0->segments_num,
-                               exp_region1_lut_offset, curve1->offset,
-                               exp_region1_num_segments, curve1->segments_num);
-
-               i++;
-       }
-
-}
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm_helper.h
deleted file mode 100644 (file)
index 1155ee5..0000000
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright 2016 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#ifndef __DAL_DPP_DCN10_CM_HELPER_H__
-#define __DAL_DPP_DCN10_CM_HELPER_H__
-
-#define TF_HELPER_REG_FIELD_LIST(type) \
-       type exp_region0_lut_offset; \
-       type exp_region0_num_segments; \
-       type exp_region1_lut_offset; \
-       type exp_region1_num_segments;\
-       type field_region_end;\
-       type field_region_end_slope;\
-       type field_region_end_base;\
-       type exp_region_start;\
-       type exp_resion_start_segment;\
-       type field_region_linear_slope
-
-#define TF_CM_REG_FIELD_LIST(type) \
-       type csc_c11; \
-       type csc_c12
-
-struct xfer_func_shift {
-       TF_HELPER_REG_FIELD_LIST(uint8_t);
-};
-
-struct xfer_func_mask {
-       TF_HELPER_REG_FIELD_LIST(uint32_t);
-};
-
-struct xfer_func_reg {
-       struct xfer_func_shift shifts;
-       struct xfer_func_mask masks;
-
-       uint32_t start_cntl_b;
-       uint32_t start_cntl_g;
-       uint32_t start_cntl_r;
-       uint32_t start_slope_cntl_b;
-       uint32_t start_slope_cntl_g;
-       uint32_t start_slope_cntl_r;
-       uint32_t start_end_cntl1_b;
-       uint32_t start_end_cntl2_b;
-       uint32_t start_end_cntl1_g;
-       uint32_t start_end_cntl2_g;
-       uint32_t start_end_cntl1_r;
-       uint32_t start_end_cntl2_r;
-       uint32_t region_start;
-       uint32_t region_end;
-};
-
-struct cm_color_matrix_shift {
-       TF_CM_REG_FIELD_LIST(uint8_t);
-};
-
-struct cm_color_matrix_mask {
-       TF_CM_REG_FIELD_LIST(uint32_t);
-};
-
-struct color_matrices_reg{
-       struct cm_color_matrix_shift shifts;
-       struct cm_color_matrix_mask masks;
-
-       uint32_t csc_c11_c12;
-       uint32_t csc_c33_c34;
-};
-
-void cm_helper_program_color_matrices(
-               struct dc_context *ctx,
-               const uint16_t *regval,
-               const struct color_matrices_reg *reg);
-
-void cm_helper_program_xfer_func(
-               struct dc_context *ctx,
-               const struct pwl_params *params,
-               const struct xfer_func_reg *reg);
-
-#endif