virtio/s390: use cacheline aligned airq bit vectors
authorHalil Pasic <pasic@linux.ibm.com>
Thu, 23 May 2019 14:50:07 +0000 (16:50 +0200)
committerHeiko Carstens <heiko.carstens@de.ibm.com>
Sat, 15 Jun 2019 10:25:28 +0000 (12:25 +0200)
The flag AIRQ_IV_CACHELINE was recently added to airq_iv_create(). Let
us use it! We actually wanted the vector to span a cacheline all along.

Signed-off-by: Halil Pasic <pasic@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Michael Mueller <mimu@linux.ibm.com>
Tested-by: Michael Mueller <mimu@linux.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
drivers/s390/virtio/virtio_ccw.c

index f995798bb025431b9eede000a337e635b986c802..1da7430f94c83b6257842d5f2536a2a31f23103b 100644 (file)
@@ -216,7 +216,8 @@ static struct airq_info *new_airq_info(void)
        if (!info)
                return NULL;
        rwlock_init(&info->lock);
-       info->aiv = airq_iv_create(VIRTIO_IV_BITS, AIRQ_IV_ALLOC | AIRQ_IV_PTR);
+       info->aiv = airq_iv_create(VIRTIO_IV_BITS, AIRQ_IV_ALLOC | AIRQ_IV_PTR
+                                  | AIRQ_IV_CACHELINE);
        if (!info->aiv) {
                kfree(info);
                return NULL;