ramips: handle PCI interrupts in plat_irq_dispatch
authorGabor Juhos <juhosg@openwrt.org>
Sun, 7 Apr 2013 13:25:38 +0000 (13:25 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Sun, 7 Apr 2013 13:25:38 +0000 (13:25 +0000)
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36245

target/linux/ramips/patches-3.8/0122-MIPS-ralink-handle-PCI-interrupts-as-well.patch [new file with mode: 0644]

diff --git a/target/linux/ramips/patches-3.8/0122-MIPS-ralink-handle-PCI-interrupts-as-well.patch b/target/linux/ramips/patches-3.8/0122-MIPS-ralink-handle-PCI-interrupts-as-well.patch
new file mode 100644 (file)
index 0000000..b898a0a
--- /dev/null
@@ -0,0 +1,30 @@
+From e0fbc01d33265d32fe7f5f34269cb88be2a13c24 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Sun, 31 Mar 2013 10:17:26 +0200
+Subject: [PATCH] MIPS: ralink: handle PCI interrupts as well
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+---
+ arch/mips/ralink/irq.c |    4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/mips/ralink/irq.c
++++ b/arch/mips/ralink/irq.c
+@@ -31,6 +31,7 @@
+ #define INTC_INT_GLOBAL               BIT(31)
+ #define RALINK_CPU_IRQ_INTC   (MIPS_CPU_IRQ_BASE + 2)
++#define RALINK_CPU_IRQ_PCI    (MIPS_CPU_IRQ_BASE + 4)
+ #define RALINK_CPU_IRQ_FE     (MIPS_CPU_IRQ_BASE + 5)
+ #define RALINK_CPU_IRQ_WIFI   (MIPS_CPU_IRQ_BASE + 6)
+ #define RALINK_CPU_IRQ_COUNTER        (MIPS_CPU_IRQ_BASE + 7)
+@@ -104,6 +105,9 @@ asmlinkage void plat_irq_dispatch(void)
+       else if (pending & STATUSF_IP6)
+               do_IRQ(RALINK_CPU_IRQ_WIFI);
++      else if (pending & STATUSF_IP4)
++              do_IRQ(RALINK_CPU_IRQ_PCI);
++
+       else if (pending & STATUSF_IP2)
+               do_IRQ(RALINK_CPU_IRQ_INTC);