selftests: bpf: add zero extend checks for ALU32 and/or/xor

Add three tests to test_verifier/basic_instr that make sure that the
high 32-bits of the destination register is cleared after an ALU32
and/or/xor.

Signed-off-by: Björn Töpel <bjorn.topel@gmail.com>
Acked-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>

diff --git a/tools/testing/selftests/bpf/verifier/basic_instr.c b/tools/testing/selftests/bpf/verifier/basic_instr.c
index ed91a7b9a4566b90c4ef99193411b5e3a3bc3185..4d844089938e6043c682ab64aa6ebb7fd6fd2f4f 100644 (file)
--- a/tools/testing/selftests/bpf/verifier/basic_instr.c
+++ b/tools/testing/selftests/bpf/verifier/basic_instr.c
@@ -132,3 +132,42 @@
        .prog_type = BPF_PROG_TYPE_SCHED_CLS,
        .result = ACCEPT,
 },
+{
+       "and32 reg zero extend check",
+       .insns = {
+       BPF_MOV64_IMM(BPF_REG_0, -1),
+       BPF_MOV64_IMM(BPF_REG_2, -2),
+       BPF_ALU32_REG(BPF_AND, BPF_REG_0, BPF_REG_2),
+       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
+       BPF_EXIT_INSN(),
+       },
+       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
+       .result = ACCEPT,
+       .retval = 0,
+},
+{
+       "or32 reg zero extend check",
+       .insns = {
+       BPF_MOV64_IMM(BPF_REG_0, -1),
+       BPF_MOV64_IMM(BPF_REG_2, -2),
+       BPF_ALU32_REG(BPF_OR, BPF_REG_0, BPF_REG_2),
+       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
+       BPF_EXIT_INSN(),
+       },
+       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
+       .result = ACCEPT,
+       .retval = 0,
+},
+{
+       "xor32 reg zero extend check",
+       .insns = {
+       BPF_MOV64_IMM(BPF_REG_0, -1),
+       BPF_MOV64_IMM(BPF_REG_2, 0),
+       BPF_ALU32_REG(BPF_XOR, BPF_REG_0, BPF_REG_2),
+       BPF_ALU64_IMM(BPF_RSH, BPF_REG_0, 32),
+       BPF_EXIT_INSN(),
+       },
+       .prog_type = BPF_PROG_TYPE_SCHED_CLS,
+       .result = ACCEPT,
+       .retval = 0,
+},