mx6: Remove PAD_CTL_DSE_120ohm from i.MX6DL's IPU1_DI0_PIN4 pin
authorOtavio Salvador <otavio@ossystems.com.br>
Mon, 21 Oct 2013 23:34:57 +0000 (21:34 -0200)
committerStefano Babic <sbabic@denx.de>
Thu, 31 Oct 2013 16:54:23 +0000 (17:54 +0100)
This removes the PAD_CTL_DSE_120ohm as done for i.MX6Q's IPU1_DI0_PIN4
pin definition and makes it aligned with 3.0.35-4.1.0 and 3.12
mainline kernel.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
arch/arm/include/asm/arch-mx6/mx6dl_pins.h

index b5df68afc6270b4bfc022d3e5183fbfbbc9ccabf..73734078e99883b9e151770a5cdc6750cac9b004 100644 (file)
@@ -210,7 +210,7 @@ enum {
        MX6_PAD_DI0_PIN3__MMDC_MMDC_DEBUG_3     = IOMUX_PAD(0x03BC, 0x00A8, 6, 0x0000, 0, 0),
        MX6_PAD_DI0_PIN3__PL301_SIM_MX6DL_PER1_HADDR_10 = IOMUX_PAD(0x03BC, 0x00A8, 7, 0x0000, 0, 0),
        MX6_PAD_DI0_PIN3__LCDIF_CS              = IOMUX_PAD(0x03BC, 0x00A8, 8, 0x0000, 0, 0),
-       MX6_PAD_DI0_PIN4__IPU1_DI0_PIN4         = IOMUX_PAD(0x03C0, 0x00AC, 0, 0x0000, 0, PAD_CTL_DSE_120ohm),
+       MX6_PAD_DI0_PIN4__IPU1_DI0_PIN4         = IOMUX_PAD(0x03C0, 0x00AC, 0, 0x0000, 0, 0),
        MX6_PAD_DI0_PIN4__LCDIF_BUSY            = IOMUX_PAD(0x03C0, 0x00AC, 1, 0x08D8, 1, 0),
        MX6_PAD_DI0_PIN4__AUDMUX_AUD6_RXD       = IOMUX_PAD(0x03C0, 0x00AC, 2, 0x0000, 0, 0),
        MX6_PAD_DI0_PIN4__USDHC1_WP             = IOMUX_PAD(0x03C0, 0x00AC, 3, 0x092C, 0, 0),