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(parent: 72f0281) | patch
drm/amd/display: register programming consolidation
authorTony Cheng <tony.cheng@amd.com>
Thu, 13 Jul 2017 02:00:34 +0000 (22:00 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 22:15:23 +0000 (18:15 -0400)
commitfc0956909f24d2cd6f69777881bcccd771a06f35
tree8513382c16d3cd72af8bd50681c7450e82bb3156tree | snapshot
parent72f0281d34b464121f9f6b75a2d7a2502055ec79commit | diff
drm/amd/display: register programming consolidation

remove redundant DPP_CLOCK_ENABLE in ipp. clock programmed by HWSS

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.c diff | blob | history
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h diff | blob | history
John Crispins staging tree