powerpc/mm: Fix crashes with 16G huge pages
authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Sun, 11 Feb 2018 15:00:06 +0000 (20:30 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 13 Feb 2018 11:37:47 +0000 (22:37 +1100)
commitfae2211697c9490414e974431051f7fed5506653
treec3f2e41f83ca138b61259eae40fd222c686923c9
parent62e984ddfd6b056d399e24113f5e6a7145e579d8
powerpc/mm: Fix crashes with 16G huge pages

To support memory keys, we moved the hash pte slot information to the
second half of the page table. This was ok with PTE entries at level
4 (PTE page) and level 3 (PMD). We already allocate larger page table
pages at those levels to accomodate extra details. For level 4 we
already have the extra space which was used to track 4k hash page
table entry details and at level 3 the extra space was allocated to
track the THP details.

With hugetlbfs PTE, we used this extra space at the PMD level to store
the slot details. But we also support hugetlbfs PTE at PUD level for
16GB pages and PUD level page didn't allocate extra space. This
resulted in memory corruption.

Fix this by allocating extra space at PUD level when HUGETLB is
enabled.

Fixes: bf9a95f9a648 ("powerpc: Free up four 64K PTE bits in 64K backed HPTE pages")
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Reviewed-by: Ram Pai <linuxram@us.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/book3s/32/pgtable.h
arch/powerpc/include/asm/book3s/64/hash-64k.h
arch/powerpc/include/asm/book3s/64/hash.h
arch/powerpc/include/asm/book3s/64/pgalloc.h
arch/powerpc/include/asm/book3s/64/pgtable.h
arch/powerpc/include/asm/nohash/32/pgtable.h
arch/powerpc/include/asm/nohash/64/pgtable.h
arch/powerpc/mm/hash_utils_64.c
arch/powerpc/mm/init-common.c
arch/powerpc/mm/pgtable-radix.c
arch/powerpc/mm/pgtable_64.c