mmc: sdhci-msm: Correct the offset and value for DDR_CONFIG register
authorVeerabhadrarao Badiganti <vbadigan@codeaurora.org>
Tue, 26 Nov 2019 10:19:16 +0000 (10:19 +0000)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 16 Dec 2019 11:25:26 +0000 (12:25 +0100)
commitfa56ac9792265354b565f28def7164e7d7db2b1e
tree8644cf4aba0f0caa6b60be24f7242d175da44f81
parent07bcc411567cb96f9d1fc84fff8d387118a2920d
mmc: sdhci-msm: Correct the offset and value for DDR_CONFIG register

The DDR_CONFIG register offset got updated after a specific
minor version of sdcc V4. This offset change has not been properly
taken care of while updating register changes for sdcc V5.

Correcting proper offset for this register.
Also updating this register value to reflect the recommended RCLK
delay.

Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ea738ec72-fa0f852d-20f8-474a-80b2-4b0ef63b132c-000000@us-west-2.amazonses.com
Fixes: f15358885dda ("mmc: sdhci-msm: Define new Register address map")
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-msm.c