arm64: mm: cleanup stale AIVIVT references
authorMark Rutland <mark.rutland@arm.com>
Tue, 21 Nov 2017 11:59:13 +0000 (11:59 +0000)
committerWill Deacon <will.deacon@arm.com>
Tue, 28 Nov 2017 18:13:18 +0000 (18:13 +0000)
commitf81a348728ec5ac43f3bbcf81c97d52baba253f7
tree2be7b3bdfa04369661c86d7858bc0f280a08cd01
parent4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323
arm64: mm: cleanup stale AIVIVT references

Since commit:

  155433cb365ee466 ("arm64: cache: Remove support for ASID-tagged VIVT I-caches")

... the kernel no longer cares about AIVIVT I-caches, as these were
removed from the architecture.

This patch removes the stale references to such I-caches.

The comment in flush_context() is also updated to clarify when and where
the TLB invalidation occurs.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/cacheflush.h
arch/arm64/mm/context.c