clk: samsung: exynos5433: Fix definitions of SCLK ISP SENSOR0 clocks
authorMarek Szyprowski <m.szyprowski@samsung.com>
Tue, 21 Jul 2015 12:37:57 +0000 (14:37 +0200)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Thu, 25 Feb 2016 11:09:57 +0000 (12:09 +0100)
commitf190a87e27aeb21b230bfb9eb5da2775bfdfb7e4
tree8f8608e1265c4ea958a46071043e819db29081d3
parenta665d30f1f2575df864e706dc8209458b8f4cf88
clk: samsung: exynos5433: Fix definitions of SCLK ISP SENSOR0 clocks

This fixes bit field offsets in the CMU_TOP CLK_DIV_SCLK_ISP_SENSOR_{A,B}
clock definitions.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
drivers/clk/samsung/clk-exynos5433.c