drm/nv50/pm: introduce hwsq-based memory reclocking
authorMartin Peres <martin.peres@ensi-bourges.fr>
Mon, 7 Nov 2011 22:38:50 +0000 (23:38 +0100)
committerBen Skeggs <bskeggs@redhat.com>
Wed, 21 Dec 2011 09:01:44 +0000 (19:01 +1000)
commiteeb7a50bddb281d7beecb0ad73c9f1233e9932c2
tree64e74c8fd82a07cc58c56cd3fe7ea492048cbbcf
parentabbd3f8e3bea4b2b0490260e67357067a2dc2039
drm/nv50/pm: introduce hwsq-based memory reclocking

More work needs to be done on supporting the different memory types.

v2 (Ben Skeggs):
- fixed up conflicts from not having pausing patch first
- restructured code somewhat to fit with how all the other code works
- fixed bug where incorrect mpll_ctrl could get set sometimes
- removed stuff that's cargo-culted from the binary driver
- merged nv92+ display disable into hwsq
- fixed incorrect opcode 0x5f magic at end of ucode

Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nouveau_hwsq.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/nv50_pm.c