perf/x86: Add Top Down events to Intel Goldmont
authorKan Liang <kan.liang@intel.com>
Fri, 10 Feb 2017 07:23:58 +0000 (02:23 -0500)
committerIngo Molnar <mingo@kernel.org>
Thu, 16 Mar 2017 08:51:10 +0000 (09:51 +0100)
commited827adb009490673c9c63e0b716e0fa36afbcc1
tree63b53642b624c916c8af3ad496f4a5ada637a4b9
parent2b95bd7d58d368fe5dcbe6f4e494847ea082d89d
perf/x86: Add Top Down events to Intel Goldmont

Goldmont supports full Top Down level 1 metrics (FrontendBound,
Retiring, Backend Bound and Bad Speculation).
It has 3 wide pipeline.

Signed-off-by: Kan Liang <kan.liang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/1486711438-80058-1-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/events/intel/core.c