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Exynos5420: DMC: Add software read leveling
authorAkshay Saraswat <akshay.s@samsung.com>
Mon, 26 May 2014 13:50:08 +0000 (19:20 +0530)
committerMinkyu Kang <mk7.kang@samsung.com>
Fri, 13 Jun 2014 08:05:14 +0000 (17:05 +0900)
commited32522fe048f9edcb3269c8d5af79c6e8c6daea
tree61a005141819f84aa56f8588f87cc78f575f42d6tree | snapshot
parentc9334fcda90652e2f8c49f4517b728ebc6f5f623commit | diff
Exynos5420: DMC: Add software read leveling

Sometimes Read DQ and DQS are not in phase. Since, this
phase shift differs from board to board, we need to
calibrate it at DRAM init phase, that's read DQ calibration.
This patch adds SW Read DQ calibration routine to compensate
this skew.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
arch/arm/cpu/armv7/exynos/dmc_init_ddr3.c diff | blob | history
arch/arm/cpu/armv7/exynos/exynos5_setup.h diff | blob | history
arch/arm/include/asm/arch-exynos/dmc.h diff | blob | history
arch/arm/include/asm/arch-exynos/power.h diff | blob | history
Broadcom-s U-Boot