clk: zx: reform pll config info to ease code extension
authorJun Nie <jun.nie@linaro.org>
Tue, 6 Sep 2016 06:02:41 +0000 (14:02 +0800)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 14 Sep 2016 20:51:05 +0000 (13:51 -0700)
commite9f262314ebf2cbe466afe74338e8d6c4c9b8897
tree64f07cd62dca868dd5a7b22b5e40537f5b809464
parent29b4817d4018df78086157ea3a55c1d9424a7cfc
clk: zx: reform pll config info to ease code extension

Add power down bit and pll lock bit in pll config structure
to ease new SoC support.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/zte/clk.c
drivers/clk/zte/clk.h