x86: qemu: Enable I/O APIC chip select on PIIX3
authorBin Meng <bmeng.cn@gmail.com>
Wed, 22 Jul 2015 08:21:11 +0000 (01:21 -0700)
committerSimon Glass <sjg@chromium.org>
Tue, 28 Jul 2015 16:36:24 +0000 (10:36 -0600)
commite7cd070da61c1dc096aa8cd45185f90f6508707b
tree2a1df3a759246765b8e09363f3f5aa55b623e15d
parent53832bb8d62df6c369edf3fbb6c9dd4b5ed38710
x86: qemu: Enable I/O APIC chip select on PIIX3

The PIIX3 chipset does not integrate an I/O APIC, instead it supports
connecting to an external I/O APIC which needs to be enabled manually.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/qemu/pci.c
arch/x86/include/asm/arch-qemu/qemu.h