net: ethernet: renesas: sh_eth: add POST registers for rz
authorChris Brandt <chris.brandt@renesas.com>
Wed, 7 Sep 2016 18:57:09 +0000 (14:57 -0400)
committerDavid S. Miller <davem@davemloft.net>
Sun, 11 Sep 2016 04:09:10 +0000 (21:09 -0700)
commite1487888eccc83e9eb5a3659955f79b039dc7945
tree595fd89112f1de615e5e3a85369a3609a32de5f7
parentc2f57fb97da5730509a50e316f353d3da17f6c25
net: ethernet: renesas: sh_eth: add POST registers for rz

Due to a mistake in the hardware manual, the FWSLC and POST1-4 registers
were not documented and left out of the driver for RZ/A making the CAM
feature non-operational.
Additionally, when the offset values for POST1-4 are left blank, the driver
attempts to set them using an offset of 0xFFFF which can cause a memory
corruption or panic.

This patch fixes the panic and properly enables CAM.

Reported-by: Daniel Palmer <daniel@0x0f.com>
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/renesas/sh_eth.c