drm/i915/cnl: Fix PORT_TX_DW5/7 register address
authorMahesh Kumar <mahesh1.kumar@intel.com>
Thu, 15 Feb 2018 09:56:41 +0000 (15:26 +0530)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 15 Feb 2018 23:46:14 +0000 (15:46 -0800)
commite103962611b2d464be6ab596d7b3495fe7b4c132
tree98d8e5659e5e757a07cb559b5073fa703ffff4d8
parent2e8bf223d8f51ffe98f7bc11522939e62ab79a55
drm/i915/cnl: Fix PORT_TX_DW5/7 register address

Register Address for CNL_PORT_DW5_LN0_D is 0x162E54, but current code is
defining it as 0x162ED4. Similarly for CNL_PORT_DW7_LN0_D register address
is defined 0x162EDC instead of 0x162E5C, fix it.

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Fixes: 04416108ccea ("drm/i915/cnl: Add registers related to voltage swing sequences.")
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180215095643.3844-2-mahesh1.kumar@intel.com
drivers/gpu/drm/i915/i915_reg.h