85xx: Ensure timebase is zero on secondary cores
authorKumar Gala <galak@kernel.crashing.org>
Mon, 8 Sep 2008 13:51:29 +0000 (08:51 -0500)
committerAndrew Fleming-AFLEMING <afleming@freescale.com>
Tue, 9 Sep 2008 21:52:45 +0000 (16:52 -0500)
commite0ff3d350d6b7960deb5a881dfc5acf3a63ef676
treebae9341cc649b87241a30b45b5cdb09a67f3627b
parent650a9e7abc44ce1ce73d6668eaf0ba2d6b8025e9
85xx: Ensure timebase is zero on secondary cores

The e500um says the timebase is volatile out of reset.  To ensure
TB sync works we need to make sure its zero.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
cpu/mpc85xx/release.S