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(parent: b3fd212) | patch
x86: Add Intel Braswell SoC support
authorBin Meng <bmeng.cn@gmail.com>
Wed, 16 Aug 2017 05:41:58 +0000 (22:41 -0700)
committerBin Meng <bmeng.cn@gmail.com>
Sat, 16 Sep 2017 06:57:44 +0000 (14:57 +0800)
commitde9ac9a1b9c0899d05d582917330092d577d5ebe
treeb290700167bcb6395540951993d8f08e3dce64c9tree | snapshot
parentb3fd2126dc8114d648b1e769b9fa621e3537bf48commit | diff
x86: Add Intel Braswell SoC support

This adds initial Intel Braswell SoC support. It uses Intel FSP
to initialize the chipset.

Similar to its predecessor BayTrail, there are some work to do to
enable the legacy UART integrated in the Braswell SoC.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch/x86/Kconfig diff | blob | history
arch/x86/cpu/Makefile diff | blob | history
arch/x86/cpu/braswell/Kconfig [new file with mode: 0644] blob
arch/x86/cpu/braswell/Makefile [new file with mode: 0644] blob
arch/x86/cpu/braswell/braswell.c [new file with mode: 0644] blob
arch/x86/cpu/braswell/cpu.c [new file with mode: 0644] blob
arch/x86/cpu/braswell/early_uart.c [new file with mode: 0644] blob
arch/x86/include/asm/arch-braswell/iomap.h [new file with mode: 0644] blob
Broadcom-s U-Boot