spi: fsl-lpspi: Prevent FIFO under/overrun by default
authorHieu Tran Dang <dangtranhieu2012@gmail.com>
Tue, 2 Oct 2018 11:06:36 +0000 (18:06 +0700)
committerMark Brown <broonie@kernel.org>
Wed, 10 Oct 2018 11:41:36 +0000 (12:41 +0100)
commitde8978c388c66b8fca192213ec9f0727e964c652
tree83a54d57de9f958ce8f01024a1dfb693f4d42c00
parenta1108c7b2efb892350ba6a0e932dfd45622f4e2b
spi: fsl-lpspi: Prevent FIFO under/overrun by default

Certain devices don't work well when a transmit FIFO underrun or
receive FIFO overrun occurs. Example is the SAF400x radio chip when
running at high speed which leads to garbage being sent to/received from
the chip. In which case, it should stall waiting for further data to be
available before proceeding. This patch unset the NOSTALL bit in CFGR1
by default to prevent this issue.

Signed-off-by: Hieu Tran Dang <dangtranhieu2012@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-fsl-lpspi.c