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(parent: ee8b1e2) | patch
MIPS: mips32/cache.S: use v1 register for indirect function calls
authorGabor Juhos <juhosg@openwrt.org>
Thu, 13 Jun 2013 10:59:36 +0000 (12:59 +0200)
committerTom Rini <trini@ti.com>
Wed, 24 Jul 2013 13:51:07 +0000 (09:51 -0400)
commitdb2c86d7d71d1be0ac0fe702493faf9302639235
tree31a0c3a4a35fa7af0ff139b5b036ae22ef76986ftree | snapshot
parentee8b1e29597bcf18bfebd6fd8eccc8e245046352commit | diff
MIPS: mips32/cache.S: use v1 register for indirect function calls

Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
arch/mips/cpu/mips32/cache.S diff | blob | history
Broadcom-s U-Boot