clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock
authorBoris Brezillon <boris.brezillon@free-electrons.com>
Thu, 1 Dec 2016 21:00:20 +0000 (22:00 +0100)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 8 Dec 2016 23:06:18 +0000 (15:06 -0800)
commitd86d46af84855403c00018be1c3e7bc190f2a6cd
treec77aaa773d62b471a580c26fd35f28050efe9aa2
parent155e8b3b0ee320ae866b97dd31eba8a1f080a772
clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock

The VEC clock requires needs to be set at exactly 108MHz. Allow rate
change propagation on PLLH_AUX to match this requirement wihtout
impacting other IPs (PLLH is currently only used by the HDMI encoder,
which cannot be enabled when the VEC encoder is enabled).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/bcm/clk-bcm2835.c