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(parent: c9eaa44) | patch
spi/pxa2xx-pci: Add PCI mode support for BayTrail LPSS SPI
authorChew, Chiau Ee <chiau.ee.chew@intel.com>
Thu, 17 Apr 2014 16:26:06 +0000 (00:26 +0800)
committerMark Brown <broonie@linaro.org>
Fri, 18 Apr 2014 17:06:07 +0000 (18:06 +0100)
commitd6ba32d5c60f569d252ec9dcd96cd46b19785b60
tree89d76a1a9d3ba8b7bfc23d9626de3836ea83b40dtree | snapshot
parentc9eaa447e77efe77b7fa4c953bd62de8297fd6c5commit | diff
spi/pxa2xx-pci: Add PCI mode support for BayTrail LPSS SPI

Similar to CE4100, BayTrail LPSS SPI can be PCI enumerated
as well. Thus, the functions are renamed from ce4100_xxx
to pxa2xx_spi_pci_xxx to clarify that this is a generic
PCI glue layer. Also, added required infrastructure to
support SPI hosts with different configurations.

This patch is based on Mika Westerberg's previous work.

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
drivers/spi/spi-pxa2xx-pci.c diff | blob | history
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