projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 8bc2eeb) | patch
clk: samsung: Add EPLL and VPLL freq table for exynos5250 SoC
authorVikas Sajjan <vikas.sajjan@linaro.org>
Tue, 11 Jun 2013 09:31:16 +0000 (15:01 +0530)
committerMike Turquette <mturquette@linaro.org>
Fri, 2 Aug 2013 20:24:18 +0000 (13:24 -0700)
commitd2127ac4518d81fa5edcaf922fdd34b54a2888a7
treec7283bee9d4425f139f2fc393ad3e90154c2ece6tree | snapshot
parent8bc2eeb83ed9d07c82f2ff22655018eae426fe33commit | diff
clk: samsung: Add EPLL and VPLL freq table for exynos5250 SoC

Adds the EPLL and VPLL freq table for exynos5250 SoC.

Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/samsung/clk-exynos5250.c diff | blob | history
drivers/clk/samsung/clk.h diff | blob | history
John Crispins staging tree