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(parent: 4059455) | patch
riscv: Fix udelay in RV32.
authorNick Hu <nickhu@andestech.com>
Thu, 30 May 2019 07:01:17 +0000 (15:01 +0800)
committerPaul Walmsley <paul.walmsley@sifive.com>
Tue, 11 Jun 2019 15:04:26 +0000 (08:04 -0700)
commitd0e1f2110a5eeb6e410b2dd37d98bc5b30da7bc7
tree9bfb7c63d1ea6a48b48a6bd222dc472835abf261tree | snapshot
parent405945588feedac8d7609113de9c62e72575a0efcommit | diff
riscv: Fix udelay in RV32.

In RV32, udelay would delay the wrong cycle. When it shifts right
"UDELAY_SHIFT" bits, it either delays 0 cycle or 1 cycle. It only works
correctly in RV64. Because the 'ucycles' always needs to be 64 bits
variable.

Signed-off-by: Nick Hu <nickhu@andestech.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
[paul.walmsley@sifive.com: fixed minor spelling error]
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
arch/riscv/lib/delay.c diff | blob | history
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