cpu/86xx fixes.
authorJon Loeliger <jdl@freescale.com>
Thu, 2 Aug 2007 19:42:20 +0000 (14:42 -0500)
committerJon Loeliger <jdl@freescale.com>
Fri, 10 Aug 2007 16:02:32 +0000 (11:02 -0500)
commitcfc7a7f5bb3273c9951173c788001d45118f141f
treef321b9a57ce6d32567df53a53f9d97bbc9ee9665
parent99c2fdab91bc633e46fb41dbaa629f87ccf6e00f
cpu/86xx fixes.

Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.

Include MSSSR0 in error message.

Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
cpu/mpc86xx/cpu_init.c
cpu/mpc86xx/interrupts.c
cpu/mpc86xx/start.S
cpu/mpc86xx/traps.c
include/asm-ppc/immap_86xx.h
include/asm-ppc/processor.h