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[WATCHDOG] i6300esb-set_correct_reload_register_bit
authorNaveen Gupta <ngupta@google.com>
Wed, 17 Aug 2005 07:11:46 +0000 (09:11 +0200)
committerWim Van Sebroeck <wim@iguana.be>
Sun, 11 Sep 2005 19:51:18 +0000 (21:51 +0200)
commitce2f50b4ae71f700c7b4b0bf0ff11c328611dae8
tree52570a06396baa2fa96eafe4b7403b9328b676edtree | snapshot
parent28562af3d4b21d687dd57c44006aeeed1036c781commit | diff
[WATCHDOG] i6300esb-set_correct_reload_register_bit

This patch writes into bit 8 of the reload register to perform the
correct 'Reload Sequence' instead of writing into bit 4 of Watchdog for
Intel 6300ESB chipset.

Signed-off-by: Naveen Gupta <ngupta@google.com>
Signed-off-by: David Hardeman <david@2gen.com>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Signed-off-by: Andrew Morton <akpm@osdl.org>
drivers/char/watchdog/i6300esb.c diff | blob | history
drivers/char/watchdog/i6300esb.h diff | blob | history
John Crispins staging tree