drm/i915: Record platform specific ppGTT size in intel_device_info
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 14 Mar 2019 22:38:36 +0000 (22:38 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 15 Mar 2019 09:04:54 +0000 (09:04 +0000)
commitcbecbccaa120fd976c2777ea80035675d6e39ec0
tree0b78b08008d63f58ff18fda9c5ac9603f5e8d10d
parentca6ac684de5d8091cca4b4eb78c54610101a0033
drm/i915: Record platform specific ppGTT size in intel_device_info

As the maximum addressable bits is determined by platform, record that
information in our static chipset tables. This has the advantage of
being clearly recorded in our capability dumps for dmesg, debugfs and
error states.

Based on a patch by Bob Paauwe.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314223839.28258-2-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_device_info.c
drivers/gpu/drm/i915/intel_device_info.h
drivers/gpu/drm/i915/selftests/huge_pages.c