rockchip: Add cache information to the SoC dtsi for RK356x
authorMilinda Brantini <C_A_T_T_E_R_Y@outlook.com>
Tue, 11 Jun 2024 03:27:42 +0000 (11:27 +0800)
committerHauke Mehrtens <hauke@hauke-m.de>
Sun, 16 Jun 2024 19:59:11 +0000 (21:59 +0200)
commitc95ed79787ab479e3e1f6b8e3e9e7b45ffeeb752
treee3854d42c7bbbfd005941d4ed3e5e75a9d192da3
parentb0d418035e92733fa9a58575b973b4bc0db0421a
rockchip: Add cache information to the SoC dtsi for RK356x

Fix cacheinfo: Unable to detect cache hierarchy for CPU 0.

Signed-off-by: Milinda Brantini <C_A_T_T_E_R_Y@outlook.com>
target/linux/rockchip/patches-6.6/031-v6.10-arm64-dts-rockchip-Add-cache-information-to-the-SoC-dtsi-.patch [new file with mode: 0644]
target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK356x.patch