arm: lpc32xx: Fix timer initialization
authorGregory CLEMENT <gregory.clement@bootlin.com>
Wed, 17 Apr 2019 09:48:45 +0000 (11:48 +0200)
committerTom Rini <trini@konsulko.com>
Fri, 26 Apr 2019 22:58:20 +0000 (18:58 -0400)
commitc8aac24629dec56334c27d98e993d2b3bb481b25
tree7bfd0091dd052b06901febe04368f32399f0516c
parent32dfc12b703faf9e6ab1e544a05ec5dba7d45449
arm: lpc32xx: Fix timer initialization

The match controller register is not cleared during
initialization. However, some bits of this register may reset the TC if
tnMRx match it.

As we can't make any assumption about how U-Boot is launched by the first
stage bootloader (such as S1L) clearing this register ensure that the
timers work as expected.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
arch/arm/cpu/arm926ejs/lpc32xx/timer.c