riscv: dts: add initial board data for the SiFive HiFive Unleashed
authorPaul Walmsley <paul.walmsley@sifive.com>
Mon, 20 May 2019 16:19:41 +0000 (09:19 -0700)
committerPaul Walmsley <paul.walmsley@sifive.com>
Mon, 17 Jun 2019 09:04:10 +0000 (02:04 -0700)
commitc35f1b87fc595807ff15d2834d241f9771497205
tree2682e7ae0a701b158505bc1123a4745cc0f61d65
parent72296bde4f4207566872ee355950a59cbc29f852
riscv: dts: add initial board data for the SiFive HiFive Unleashed

Add initial board data for the SiFive HiFive Unleashed A00.

Currently the data populated in this DT file describes the board
DRAM configuration and the external clock sources that supply the
PRCI.

Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Loys Ollivier <lollivier@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Antony Pavlov <antonynpavlov@gmail.com>
Cc: devicetree@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
arch/riscv/boot/dts/sifive/Makefile [new file with mode: 0644]
arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts [new file with mode: 0644]