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MIPS: Alchemy: DB1xxx: Explicitly set 50MHz clock for I2C/SPI units.
authorManuel Lauss <manuel.lauss@gmail.com>
Wed, 20 Aug 2014 19:36:32 +0000 (21:36 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 22 Sep 2014 11:35:47 +0000 (13:35 +0200)
commitc02a505e5a7787ee7aa871152ba571e6c1d1dc62
tree5eb900f8a3f1e9cc442b80421342379b65d6720ctree | snapshot
parent7ec32e4965ae69976de0fb0f340496904e23e113commit | diff
MIPS: Alchemy: DB1xxx: Explicitly set 50MHz clock for I2C/SPI units.

Add an explicit call to set the desired rate to get the correct
clock routing for the PSC clocks.  It wasn't broken before, but
now it's less affected by bootloader changes.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7554/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/alchemy/devboards/db1300.c diff | blob | history
arch/mips/alchemy/devboards/db1550.c diff | blob | history
John Crispins staging tree